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Reel/Frame:071704/0816   Pages: 65
Recorded: 06/23/2025
Attorney Dkt #:5109-EDI-GEN
Conveyance: ASSIGNMENT OF ASSIGNORS INTEREST (SEE DOCUMENT FOR DETAILS).
Total properties: 53
1
Patent #:
NONE
Issue Dt:
Application #:
11480812
Filing Dt:
07/05/2006
Publication #:
US20060274470
Pub Dt:
12/07/2006
Title:
Contact material, device including contact material, and method of making
2
Patent #:
NONE
Issue Dt:
Application #:
11828550
Filing Dt:
07/26/2007
Publication #:
US20090028491
Pub Dt:
01/29/2009
Title:
INTERCONNECT STRUCTURE
3
Patent #:
7915696
Issue Dt:
03/29/2011
Application #:
11877786
Filing Dt:
10/24/2007
Publication #:
US20090107812
Pub Dt:
04/30/2009
Title:
ELECTRICAL CONNECTION THROUGH A SUBSTRATE TO A MICROELECTROMECHANICAL DEVICE
4
Patent #:
7752751
Issue Dt:
07/13/2010
Application #:
12058912
Filing Dt:
03/31/2008
Publication #:
US20090242263
Pub Dt:
10/01/2009
Title:
SYSTEM AND METHOD OF FORMING A LOW PROFILE CONFORMAL SHIELD
5
Patent #:
7952187
Issue Dt:
05/31/2011
Application #:
12059075
Filing Dt:
03/31/2008
Publication #:
US20090243081
Pub Dt:
10/01/2009
Title:
SYSTEM AND METHOD OF FORMING A WAFER SCALE PACKAGE
6
Patent #:
9953910
Issue Dt:
04/24/2018
Application #:
12061141
Filing Dt:
04/02/2008
Publication #:
US20080318027
Pub Dt:
12/25/2008
Title:
DEMOUNTABLE INTERCONNECT STRUCTURE
7
Patent #:
9610758
Issue Dt:
04/04/2017
Application #:
12061145
Filing Dt:
04/02/2008
Publication #:
US20080314867
Pub Dt:
12/25/2008
Title:
METHOD OF MAKING DEMOUNTABLE INTERCONNECT STRUCTURE
8
Patent #:
8259454
Issue Dt:
09/04/2012
Application #:
12102429
Filing Dt:
04/14/2008
Publication #:
US20090255709
Pub Dt:
10/15/2009
Title:
INTERCONNECT STRUCTURE INCLUDING HYBRID FRAME PANEL
9
Patent #:
7727808
Issue Dt:
06/01/2010
Application #:
12138553
Filing Dt:
06/13/2008
Publication #:
US20090309241
Pub Dt:
12/17/2009
Title:
ULTRA THIN DIE ELECTRONIC PACKAGE
10
Patent #:
8114708
Issue Dt:
02/14/2012
Application #:
12241236
Filing Dt:
09/30/2008
Publication #:
US20100078797
Pub Dt:
04/01/2010
Title:
SYSTEM AND METHOD FOR PRE-PATTERNED EMBEDDED CHIP BUILD-UP
11
Patent #:
8276268
Issue Dt:
10/02/2012
Application #:
12263874
Filing Dt:
11/03/2008
Publication #:
US20100108370
Pub Dt:
05/06/2010
Title:
SYSTEM AND METHOD OF FORMING A PATTERNED CONFORMAL STRUCTURE
12
Patent #:
8008125
Issue Dt:
08/30/2011
Application #:
12399083
Filing Dt:
03/06/2009
Publication #:
US20100224992
Pub Dt:
09/09/2010
Title:
SYSTEM AND METHOD FOR STACKED DIE EMBEDDED CHIP BUILD-UP
13
Patent #:
8026608
Issue Dt:
09/27/2011
Application #:
12410237
Filing Dt:
03/24/2009
Publication #:
US20100244225
Pub Dt:
09/30/2010
Title:
STACKABLE ELECTRONIC PACKAGE
14
Patent #:
NONE
Issue Dt:
Application #:
12410255
Filing Dt:
03/24/2009
Publication #:
US20110156261
Pub Dt:
06/30/2011
Title:
INTEGRATED CIRCUIT PACKAGE AND METHOD OF MAKING SAME
15
Patent #:
10014286
Issue Dt:
07/03/2018
Application #:
12463090
Filing Dt:
05/08/2009
Publication #:
US20100244226
Pub Dt:
09/30/2010
Title:
STACKABLE ELECTRONIC PACKAGE AND METHOD OF FABRICATING SAME
16
Patent #:
9299661
Issue Dt:
03/29/2016
Application #:
12467748
Filing Dt:
05/18/2009
Publication #:
US20100244235
Pub Dt:
09/30/2010
Title:
INTEGRATED CIRCUIT PACKAGE AND METHOD OF MAKING SAME
17
Patent #:
8115117
Issue Dt:
02/14/2012
Application #:
12488639
Filing Dt:
06/22/2009
Publication #:
US20100319981
Pub Dt:
12/23/2010
Title:
SYSTEM AND METHOD OF FORMING ISOLATED CONFORMAL SHIELDING AREAS
18
Patent #:
8405996
Issue Dt:
03/26/2013
Application #:
12826337
Filing Dt:
06/29/2010
Publication #:
US20100328896
Pub Dt:
12/30/2010
Title:
ARTICLE INCLUDING THERMAL INTERFACE ELEMENT AND METHOD OF PREPARATION
19
Patent #:
8054148
Issue Dt:
11/08/2011
Application #:
12893444
Filing Dt:
09/29/2010
Publication #:
US20110062003
Pub Dt:
03/17/2011
Title:
CONTACT MATERIAL, DEVICE INCLUDING CONTACT MATERIAL, AND METHOD OF MAKING
20
Patent #:
8536700
Issue Dt:
09/17/2013
Application #:
13101249
Filing Dt:
05/05/2011
Publication #:
US20110210440
Pub Dt:
09/01/2011
Title:
STACKABLE ELECTRONIC PACKAGE AND METHOD OF FABRICATING SAME
21
Patent #:
8498131
Issue Dt:
07/30/2013
Application #:
13136736
Filing Dt:
08/09/2011
Publication #:
US20110299821
Pub Dt:
12/08/2011
Title:
INTERCONNECT STRUCTURE
22
Patent #:
8698258
Issue Dt:
04/15/2014
Application #:
13249492
Filing Dt:
09/30/2011
Publication #:
US20130082376
Pub Dt:
04/04/2013
Title:
3D INTEGRATED ELECTRONIC DEVICE STRUCTURE INCLUDING INCREASED THERMAL DISSIPATION CAPABILITIES
23
Patent #:
8748754
Issue Dt:
06/10/2014
Application #:
13301941
Filing Dt:
11/22/2011
Publication #:
US20120069523
Pub Dt:
03/22/2012
Title:
SYSTEM AND METHOD OF FORMING A PATTERNED CONFORMAL STRUCTURE
24
Patent #:
NONE
Issue Dt:
Application #:
13327333
Filing Dt:
12/15/2011
Publication #:
US20120171816
Pub Dt:
07/05/2012
Title:
INTEGRATED CIRCUIT PACKAGE AND METHOD OF MAKING SAME
25
Patent #:
8658473
Issue Dt:
02/25/2014
Application #:
13431168
Filing Dt:
03/27/2012
Publication #:
US20130256900
Pub Dt:
10/03/2013
Title:
ULTRATHIN BURIED DIE MODULE AND METHOD OF MANUFACTURING THEREOF
26
Patent #:
8940582
Issue Dt:
01/27/2015
Application #:
13969965
Filing Dt:
08/19/2013
Publication #:
US20130344653
Pub Dt:
12/26/2013
Title:
STACKABLE ELECTRONIC PACKAGE AND METHOD OF FABRICATING SAME
27
Patent #:
9496199
Issue Dt:
11/15/2016
Application #:
14093768
Filing Dt:
12/02/2013
Publication #:
US20140151871
Pub Dt:
06/05/2014
Title:
HEAT SPREADER WITH FLEXIBLE TOLERANCE MECHANISM
28
Patent #:
8802475
Issue Dt:
08/12/2014
Application #:
14186362
Filing Dt:
02/21/2014
Publication #:
US20140170811
Pub Dt:
06/19/2014
Title:
METHOD OF FABRICATING A 3D INTEGRATED ELECTRONIC DEVICE STRUCTURE INCLUDING INCREASED THERMAL DISSIPATION CAPABILITIES
29
Patent #:
9236348
Issue Dt:
01/12/2016
Application #:
14188093
Filing Dt:
02/24/2014
Publication #:
US20140183750
Pub Dt:
07/03/2014
Title:
ULTRATHIN BURIED DIE MODULE AND METHOD OF MANUFACTURING THEREOF
30
Patent #:
9252138
Issue Dt:
02/02/2016
Application #:
14287237
Filing Dt:
05/27/2014
Publication #:
US20150348952
Pub Dt:
12/03/2015
Title:
INTERCONNECT DEVICES FOR ELECTRONIC PACKAGING ASSEMBLIES
31
Patent #:
10431509
Issue Dt:
10/01/2019
Application #:
14529311
Filing Dt:
10/31/2014
Publication #:
US20160126195
Pub Dt:
05/05/2016
Title:
NON-MAGNETIC PACKAGE AND METHOD OF MANUFACTURE
32
Patent #:
10196745
Issue Dt:
02/05/2019
Application #:
14529410
Filing Dt:
10/31/2014
Publication #:
US20160122183
Pub Dt:
05/05/2016
Title:
LID AND METHOD FOR SEALING A NON-MAGNETIC PACKAGE
33
Patent #:
9570783
Issue Dt:
02/14/2017
Application #:
14839402
Filing Dt:
08/28/2015
Publication #:
US20170062890
Pub Dt:
03/02/2017
Title:
RADIO FREQUENCY MICRO-ELECTROMECHANICAL SYSTEMS HAVING INVERTED MICROSTRIP TRANSMISSION LINES AND METHOD OF MAKING THE SAME
34
Patent #:
10660208
Issue Dt:
05/19/2020
Application #:
15209244
Filing Dt:
07/13/2016
Publication #:
US20180020548
Pub Dt:
01/18/2018
Title:
EMBEDDED DRY FILM BATTERY MODULE AND METHOD OF MANUFACTURING THEREOF
35
Patent #:
10068879
Issue Dt:
09/04/2018
Application #:
15269576
Filing Dt:
09/19/2016
Publication #:
US20180082981
Pub Dt:
03/22/2018
Title:
THREE-DIMENSIONAL STACKED INTEGRATED CIRCUIT DEVICES AND METHODS OF ASSEMBLING THE SAME
36
Patent #:
9966361
Issue Dt:
05/08/2018
Application #:
15343248
Filing Dt:
11/04/2016
Publication #:
US20180130770
Pub Dt:
05/10/2018
Title:
ELECTRONICS PACKAGE HAVING A MULTI-THICKNESS CONDUCTOR LAYER AND METHOD OF MANUFACTURING THEREOF
37
Patent #:
9793191
Issue Dt:
10/17/2017
Application #:
15345778
Filing Dt:
11/08/2016
Publication #:
US20170053853
Pub Dt:
02/23/2017
Title:
HEAT SPREADER WITH FLEXIBLE TOLERANCE MECHANISM
38
Patent #:
RE47651
Issue Dt:
10/15/2019
Application #:
15415549
Filing Dt:
01/25/2017
Title:
STACKABLE ELECTRONIC PACKAGE AND METHOD OF FABRICATING SAME
39
Patent #:
9806390
Issue Dt:
10/31/2017
Application #:
15429227
Filing Dt:
02/10/2017
Publication #:
US20170155179
Pub Dt:
06/01/2017
Title:
RADIO FREQUENCY DIE PACKAGE WITH INVERTED GROUND PLANE AND METHOD OF MAKING SAME
40
Patent #:
10208382
Issue Dt:
02/19/2019
Application #:
15465172
Filing Dt:
03/21/2017
Publication #:
US20170191167
Pub Dt:
07/06/2017
Title:
METHOD FOR MAKING A SEAM-SEALABLE NON-MAGNETIC LID AND PACKAGE
41
Patent #:
10163773
Issue Dt:
12/25/2018
Application #:
15675144
Filing Dt:
08/11/2017
Title:
ELECTRONICS PACKAGE HAVING A SELF-ALIGNING INTERCONNECT ASSEMBLY AND METHOD OF MAKING SAME
42
Patent #:
10211141
Issue Dt:
02/19/2019
Application #:
15816254
Filing Dt:
11/17/2017
Title:
SEMICONDUCTOR LOGIC DEVICE AND SYSTEM AND METHOD OF EMBEDDED PACKAGING OF SAME
43
Patent #:
10276523
Issue Dt:
04/30/2019
Application #:
15816312
Filing Dt:
11/17/2017
Publication #:
US20190157226
Pub Dt:
05/23/2019
Title:
SEMICONDUCTOR LOGIC DEVICE AND SYSTEM AND METHOD OF EMBEDDED PACKAGING OF SAME
44
Patent #:
10566301
Issue Dt:
02/18/2020
Application #:
15816360
Filing Dt:
11/17/2017
Publication #:
US20190157227
Pub Dt:
05/23/2019
Title:
SEMICONDUCTOR LOGIC DEVICE AND SYSTEM AND METHOD OF EMBEDDED PACKAGING OF SAME
45
Patent #:
10396053
Issue Dt:
08/27/2019
Application #:
15816396
Filing Dt:
11/17/2017
Publication #:
US20190157233
Pub Dt:
05/23/2019
Title:
SEMICONDUCTOR LOGIC DEVICE AND SYSTEM AND METHOD OF EMBEDDED PACKAGING OF SAME
46
Patent #:
RE48015
Issue Dt:
05/26/2020
Application #:
15886478
Filing Dt:
02/01/2018
Title:
INTERCONNECT DEVICES FOR ELECTRONIC PACKAGING ASSEMBLIES
47
Patent #:
11309304
Issue Dt:
04/19/2022
Application #:
15956231
Filing Dt:
04/18/2018
Publication #:
US20180240789
Pub Dt:
08/23/2018
Title:
STACKABLE ELECTRONIC PACKAGE AND METHOD OF FABRICATING SAME
48
Patent #:
10553556
Issue Dt:
02/04/2020
Application #:
15962570
Filing Dt:
04/25/2018
Publication #:
US20180240779
Pub Dt:
08/23/2018
Title:
ELECTRONICS PACKAGE HAVING A MULTI-THICKNESS CONDUCTOR LAYER AND METHOD OF MANUFACTURING THEREOF
49
Patent #:
10504826
Issue Dt:
12/10/2019
Application #:
16153892
Filing Dt:
10/08/2018
Title:
DEVICE ALMOST LAST EMBEDDED DEVICE STRUCTURE AND METHOD OF MANUFACTURING THEREOF
50
Patent #:
10692737
Issue Dt:
06/23/2020
Application #:
16153905
Filing Dt:
10/08/2018
Publication #:
US20200111680
Pub Dt:
04/09/2020
Title:
MULTILAYER INTERCONNECT STRUCTURE WITH BURIED CONDUCTIVE VIA CONNECTIONS AND METHOD OF MANUFACTURING THEREOF
51
Patent #:
10957832
Issue Dt:
03/23/2021
Application #:
16166313
Filing Dt:
10/22/2018
Publication #:
US20200127178
Pub Dt:
04/23/2020
Title:
ELECTRONICS PACKAGE FOR LIGHT EMITTING SEMICONDUCTOR DEVICES AND METHOD OF MANUFACTURING THEREOF
52
Patent #:
10804174
Issue Dt:
10/13/2020
Application #:
16205451
Filing Dt:
11/30/2018
Publication #:
US20190103331
Pub Dt:
04/04/2019
Title:
NON-MAGNETIC PACKAGE AND METHOD OF MANUFACTURE
53
Patent #:
10607929
Issue Dt:
03/31/2020
Application #:
16229049
Filing Dt:
12/21/2018
Publication #:
US20190148279
Pub Dt:
05/16/2019
Title:
ELECTRONICS PACKAGE HAVING A SELF-ALIGNING INTERCONNECT ASSEMBLY AND METHOD OF MAKING SAME
Assignor
1
GENERAL ELECTRIC COMPANY
Exec Dt:
06/30/2024
Assignee
1
GE INTELLECTUAL PROPERTY LICENSING, LLC
1 RESEARCH CIRCLE
NISKAYUNA, NEW YORK 12309
Correspondence name and address
MR. TAREK N. FAHMI
2150 N. FIRST STREET, SUITE 420
SAN JOSE, CA 95131

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