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Patent Assignment Details
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Reel/Frame:038707/0819   Pages: 6
Recorded: 05/16/2016
Conveyance: SECURITY AGREEMENT
Total properties: 7
1
Patent #:
Issue Dt:
02/28/2017
Application #:
14177216
Filing Dt:
02/10/2014
Publication #:
Pub Dt:
10/09/2014
Title:
MEMORY APPARATUS AND METHODS THEREOF FOR PREVENTING READ ERRORS ON WEAK PAGES IN A NON-VOLATILE MEMORY SYSTEM
2
Patent #:
Issue Dt:
03/20/2018
Application #:
14177219
Filing Dt:
02/10/2014
Publication #:
Pub Dt:
10/09/2014
Title:
SHUTDOWNS AND DATA RECOVERY TO AVOID READ ERRORS WEAK PAGES IN A NON-VOLATILE MEMORY SYSTEM
3
Patent #:
Issue Dt:
11/14/2017
Application #:
14803091
Filing Dt:
07/19/2015
Publication #:
Pub Dt:
01/21/2016
Title:
INCREMENTAL ERROR DETECTION AND CORRECTION FOR MEMORIES
4
Patent #:
Issue Dt:
06/13/2017
Application #:
14835642
Filing Dt:
08/25/2015
Publication #:
Pub Dt:
02/25/2016
Title:
3-D PLANES MEMORY DEVICE
5
Patent #:
Issue Dt:
01/16/2018
Application #:
14841672
Filing Dt:
08/31/2015
Publication #:
Pub Dt:
03/02/2017
Title:
4F2 SCR MEMORY DEVICE
6
Patent #:
Issue Dt:
12/05/2017
Application #:
14956173
Filing Dt:
12/01/2015
Publication #:
Pub Dt:
06/02/2016
Title:
DEPOSITION METHOD FOR PLANAR SURFACES
7
Patent #:
Issue Dt:
02/14/2017
Application #:
14967025
Filing Dt:
12/11/2015
Publication #:
Pub Dt:
07/28/2016
Title:
METHOD FOR FORMING PCM AND RRAM 3-D MEMORY CELLS
Assignor
1
Exec Dt:
05/12/2016
Assignee
1
633 WEST FIFTH STREET, 24TH FLOOR
GLOBAL CORPORATE TRUST SERVICES
LOS ANGELES, CALIFORNIA 90071
Correspondence name and address
ELAINE CARRERA, LEGAL ASSISTANT
80 PINE STREET
C/O CAHILL GORDON & REINDAL LLP
NEW YORK, NY 10005

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