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Patent Assignment Details
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Reel/Frame:015270/0836   Pages: 5
Recorded: 10/20/2004
Conveyance: ASSIGNMENT OF ASSIGNORS INTEREST (SEE DOCUMENT FOR DETAILS).
Total properties: 5
1
Patent #:
Issue Dt:
02/01/2005
Application #:
10617511
Filing Dt:
07/11/2003
Publication #:
Pub Dt:
02/12/2004
Title:
DRAM WITH VERTICAL TRANSISTOR AND TRENCH CAPACITOR MEMORY CELLS AND METHOD OF FABRICATION
2
Patent #:
Issue Dt:
08/23/2005
Application #:
10709472
Filing Dt:
05/07/2004
Title:
METHOD FOR FABRICATING A TRENCH HAVING A BURIED DIELECTRIC COLLAR
3
Patent #:
Issue Dt:
02/28/2006
Application #:
10748995
Filing Dt:
12/30/2003
Publication #:
Pub Dt:
06/30/2005
Title:
TRANSISTOR WITH SILICON AND CARBON LAYER IN THE CHANNEL REGION
4
Patent #:
Issue Dt:
09/19/2006
Application #:
10819633
Filing Dt:
04/07/2004
Publication #:
Pub Dt:
10/13/2005
Title:
PLUGGABLE TRANSCEIVER WITH COVER RESILIENT MEMBER
5
Patent #:
Issue Dt:
10/17/2006
Application #:
10820292
Filing Dt:
04/08/2004
Publication #:
Pub Dt:
10/13/2005
Title:
MULTICHIP PACKAGE WITH CLOCK FREQUENCY ADJUSTMENT
Assignor
1
Exec Dt:
10/20/2004
Assignee
1
ST.-MARTIN-STR. 53
MUNICH, GERMANY 81669
Correspondence name and address
HEATHER ROWLAND
3000 CENTREGREEN WAY
CARY, NC 27513

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