Patent Assignment Details
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For pending or abandoned applications please consult USPTO staff.
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Reel/Frame: | 015270/0836 | |
| Pages: | 5 |
| | Recorded: | 10/20/2004 | | |
Conveyance: | ASSIGNMENT OF ASSIGNORS INTEREST (SEE DOCUMENT FOR DETAILS). |
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Total properties:
5
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Patent #:
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Issue Dt:
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02/01/2005
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Application #:
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10617511
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Filing Dt:
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07/11/2003
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Publication #:
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Pub Dt:
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02/12/2004
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Title:
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DRAM WITH VERTICAL TRANSISTOR AND TRENCH CAPACITOR MEMORY CELLS AND METHOD OF FABRICATION
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Patent #:
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Issue Dt:
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08/23/2005
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Application #:
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10709472
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Filing Dt:
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05/07/2004
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Title:
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METHOD FOR FABRICATING A TRENCH HAVING A BURIED DIELECTRIC COLLAR
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Patent #:
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Issue Dt:
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02/28/2006
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Application #:
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10748995
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Filing Dt:
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12/30/2003
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Publication #:
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Pub Dt:
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06/30/2005
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Title:
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TRANSISTOR WITH SILICON AND CARBON LAYER IN THE CHANNEL REGION
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Patent #:
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Issue Dt:
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09/19/2006
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Application #:
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10819633
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Filing Dt:
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04/07/2004
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Publication #:
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Pub Dt:
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10/13/2005
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Title:
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PLUGGABLE TRANSCEIVER WITH COVER RESILIENT MEMBER
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Patent #:
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Issue Dt:
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10/17/2006
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Application #:
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10820292
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Filing Dt:
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04/08/2004
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Publication #:
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Pub Dt:
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10/13/2005
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Title:
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MULTICHIP PACKAGE WITH CLOCK FREQUENCY ADJUSTMENT
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Assignee
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ST.-MARTIN-STR. 53 |
MUNICH, GERMANY 81669 |
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Correspondence name and address
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HEATHER ROWLAND
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3000 CENTREGREEN WAY
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CARY, NC 27513
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