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Patent Assignment Details

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Reel/Frame:	035578/0838			Pages:	10
		Recorded:	05/06/2015
Attorney Dkt #:	CONV-0001
Conveyance:	ASSIGNMENT OF ASSIGNORS INTEREST (SEE DOCUMENT FOR DETAILS).

Total properties: 11

Patent #:	8156307	Issue Dt:	04/10/2012	Application #:	11841406	Filing Dt:	08/20/2007
Publication #:	US20090055596	Pub Dt:	02/26/2009
Title:	MULTI-PROCESSOR SYSTEM HAVING AT LEAST ONE PROCESSOR THAT COMPRISES A DYNAMICALLY RECONFIGURABLE INSTRUCTION SET

Patent #:	8561037	Issue Dt:	10/15/2013	Application #:	11847169	Filing Dt:	08/29/2007
Publication #:	US20090064095	Pub Dt:	03/05/2009
Title:	COMPILER FOR GENERATING AN EXECUTABLE COMPRISING INSTRUCTIONS FOR A PLURALITY OF DIFFERENT INSTRUCTION SETS

Patent #:	8122229	Issue Dt:	02/21/2012	Application #:	11854432	Filing Dt:	09/12/2007
Publication #:	US20090070553	Pub Dt:	03/12/2009
Title:	DISPATCH MECHANISM FOR DISPATCHING INSTRUCTIONS FROM A HOST PROCESSOR TO A CO-PROCESSOR

Patent #:	9710384	Issue Dt:	07/18/2017	Application #:	11969792	Filing Dt:	01/04/2008
Publication #:	US20090177843	Pub Dt:	07/09/2009
Title:	MICROPROCESSOR ARCHITECTURE HAVING ALTERNATIVE MEMORY ACCESS PATHS

Patent #:	8095735	Issue Dt:	01/10/2012	Application #:	12186344	Filing Dt:	08/05/2008
Publication #:	US20100037024	Pub Dt:	02/11/2010
Title:	MEMORY INTERLEAVE FOR HETEROGENEOUS COMPUTING

Patent #:	9015399	Issue Dt:	04/21/2015	Application #:	12186372	Filing Dt:	08/05/2008
Publication #:	US20100036997	Pub Dt:	02/11/2010
Title:	MULTIPLE DATA CHANNEL MEMORY MODULE ARCHITECTURE

Patent #:	8205066	Issue Dt:	06/19/2012	Application #:	12263203	Filing Dt:	10/31/2008
Publication #:	US20100115237	Pub Dt:	05/06/2010
Title:	DYNAMICALLY CONFIGURED COPROCESSOR FOR DIFFERENT EXTENDED INSTRUCTION SET PERSONALITY SPECIFIC TO APPLICATION PROGRAM WITH SHARED MEMORY STORING INSTRUCTIONS INVISIBLY DISPATCHED FROM HOST PROCESSOR

Patent #:	8423745	Issue Dt:	04/16/2013	Application #:	12619441	Filing Dt:	11/16/2009
Title:	SYSTEMS AND METHODS FOR MAPPING A NEIGHBORHOOD OF DATA TO GENERAL REGISTERS OF A PROCESSING ELEMENT

Patent #:	8443147	Issue Dt:	05/14/2013	Application #:	13311378	Filing Dt:	12/05/2011
Publication #:	US20120079177	Pub Dt:	03/29/2012
Title:	MEMORY INTERLEAVE FOR HETEROGENEOUS COMPUTING

Patent #:	8972958	Issue Dt:	03/03/2015	Application #:	13658617	Filing Dt:	10/23/2012
Title:	MULTISTAGE DEVELOPMENT WORKFLOW FOR GENERATING A CUSTOM INSTRUCTION SET RECONFIGURABLE PROCESSOR

Patent #:	10430190	Issue Dt:	10/01/2019	Application #:	13834362	Filing Dt:	03/15/2013
Publication #:	US20130332711	Pub Dt:	12/12/2013
Title:	SYSTEMS AND METHODS FOR SELECTIVELY CONTROLLING MULTITHREADED EXECUTION OF EXECUTABLE CODE SEGMENTS

Assignor

Exec Dt:

03/30/2015

Assignee

8000 S. FEDERAL WAY

MAIL STOP 1-525

BOISE, IDAHO 83707

Correspondence name and address
	MICRON TECHNOLOGY, INC.
	8000 S. FEDERAL WAY
	MAIL STOP -525
	BOISE, ID 83707

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