Patent Assignment Details
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Reel/Frame: | 011293/0841 | |
| Pages: | 3 |
| | Recorded: | 11/28/2000 | | |
Conveyance: | ASSIGNMENT OF ASSIGNORS INTEREST (SEE DOCUMENT FOR DETAILS). |
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Total properties:
1
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Patent #:
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Issue Dt:
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06/03/2003
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Application #:
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09722691
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Filing Dt:
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11/28/2000
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Title:
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WIRING METHOD FOR SEMICONDUCTOR INTEGRATED CIRCUIT AND COMPUTER PRODUCT USING MAXIMUM A GAP BETWEEN TIMES
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Assignee
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2-3, MARUNOUCHI 2-CHOME, CHIYODA-KU |
TOKYO, JAPAN 100-8 |
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Correspondence name and address
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LEYDIG, VOIT & MAYER, LTD.
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JEFFREY A. WYAND
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700 THIRTEENTH ST., NW
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SUITE 300
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WASHINGTON, D.C. 20005-3960
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