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Patent Assignment Details
NOTE:Results display only for issued patents and published applications. For pending or abandoned applications please consult USPTO staff.

Reel/Frame:026024/0842   Pages: 23
Recorded: 03/25/2011
Conveyance: ASSIGNMENT OF ASSIGNORS INTEREST (SEE DOCUMENT FOR DETAILS).
Total properties: 16
1
Patent #:
8461035
Issue Dt:
06/11/2013
Application #:
12894235
Filing Dt:
09/30/2010
Title:
METHOD FOR FABRICATION OF A SEMICONDUCTOR DEVICE AND STRUCTURE
2
Patent #:
8258810
Issue Dt:
09/04/2012
Application #:
12894252
Filing Dt:
09/30/2010
Publication #:
US20120194218
Pub Dt:
08/02/2012
Title:
3D SEMICONDUCTOR DEVICE
3
Patent #:
8163581
Issue Dt:
04/24/2012
Application #:
12904103
Filing Dt:
10/13/2010
Title:
SEMICONDUCTOR AND OPTOELECTRONIC DEVICES
4
Patent #:
8362800
Issue Dt:
01/29/2013
Application #:
12904108
Filing Dt:
10/13/2010
Publication #:
US20120194216
Pub Dt:
08/02/2012
Title:
3D SEMICONDUCTOR DEVICE INCLUDING FIELD REPAIRABLE LOGICS
5
Patent #:
8373230
Issue Dt:
02/12/2013
Application #:
12904114
Filing Dt:
10/13/2010
Title:
METHOD FOR FABRICATION OF A SEMICONDUCTOR DEVICE AND STRUCTURE
6
Patent #:
8476145
Issue Dt:
07/02/2013
Application #:
12904119
Filing Dt:
10/13/2010
Publication #:
US20120193719
Pub Dt:
08/02/2012
Title:
METHOD OF FABRICATING A SEMICONDUCTOR DEVICE AND STRUCTURE
7
Patent #:
8379458
Issue Dt:
02/19/2013
Application #:
12904124
Filing Dt:
10/13/2010
Title:
SEMICONDUCTOR DEVICE AND STRUCTURE
8
Patent #:
8427200
Issue Dt:
04/23/2013
Application #:
12941073
Filing Dt:
11/07/2010
Publication #:
US20120196409
Pub Dt:
08/02/2012
Title:
3D SEMICONDUCTOR DEVICE
9
Patent #:
9577642
Issue Dt:
02/21/2017
Application #:
12941074
Filing Dt:
11/07/2010
Publication #:
US20120193806
Pub Dt:
08/02/2012
Title:
METHOD TO FORM A 3D SEMICONDUCTOR DEVICE
10
Patent #:
8373439
Issue Dt:
02/12/2013
Application #:
12941075
Filing Dt:
11/07/2010
Publication #:
US20120193681
Pub Dt:
08/02/2012
Title:
3D SEMICONDUCTOR DEVICE
11
Patent #:
8536023
Issue Dt:
09/17/2013
Application #:
12951913
Filing Dt:
11/22/2010
Publication #:
US20120220102
Pub Dt:
08/30/2012
Title:
METHOD OF MANUFACTURING A SEMICONDUCTOR DEVICE AND STRUCTURE
12
Patent #:
8492886
Issue Dt:
07/23/2013
Application #:
12951924
Filing Dt:
11/22/2010
Publication #:
US20120196390
Pub Dt:
08/02/2012
Title:
3D INTEGRATED CIRCUIT WITH LOGIC
13
Patent #:
8541819
Issue Dt:
09/24/2013
Application #:
12963659
Filing Dt:
12/09/2010
Title:
A SEMICONDUCTOR DEVICE AND STRUCTURE
14
Patent #:
8298875
Issue Dt:
10/30/2012
Application #:
13041404
Filing Dt:
03/06/2011
Title:
METHOD FOR FABRICATION OF A SEMICONDUCTOR DEVICE AND STRUCTURE
15
Patent #:
8901613
Issue Dt:
12/02/2014
Application #:
13041405
Filing Dt:
03/06/2011
Publication #:
US20120223436
Pub Dt:
09/06/2012
Title:
SEMICONDUCTOR DEVICE AND STRUCTURE FOR HEAT REMOVAL
16
Patent #:
9509313
Issue Dt:
11/29/2016
Application #:
13041406
Filing Dt:
03/06/2011
Publication #:
US20120193621
Pub Dt:
08/02/2012
Title:
3D SEMICONDUCTOR DEVICE
Assignors
1
CRONQUIST, BRIAN
Exec Dt:
03/16/2011
2
BEINGLASS, ISRAEL
Exec Dt:
03/16/2011
3
DEJONG, JAN LODEWIJK
Exec Dt:
03/16/2011
4
SEKAR, DEEPAK C.
Exec Dt:
03/16/2011
5
WURMAN, ZE'EV
Exec Dt:
03/16/2011
6
LIM, PAUL
Exec Dt:
03/16/2011
Assignee
1
MONOLITHIC 3D INC.
3555 WOODFORD DRIVE
SAN JOSE, CALIFORNIA 95124
Correspondence name and address
BAO TRAN
PO BOX 68
SARATOGA, CA 95071

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