skip navigationU S P T O SealUnited States Patent and Trademark Office AOTW logo
Home|Site Index|Search|Guides|Contacts|eBusiness|eBiz alerts|News|Help
Assignments on the Web > Patent Query
Patent Assignment Details
NOTE:Results display only for issued patents and published applications. For pending or abandoned applications please consult USPTO staff.

Reel/Frame:035102/0842   Pages: 12
Recorded: 03/06/2015
Attorney Dkt #:CNB-DIABLO (PATENTS)
Conveyance: SECURITY INTEREST (SEE DOCUMENT FOR DETAILS).
Total properties: 21
1
Patent #:
7889786
Issue Dt:
02/15/2011
Application #:
10569825
Filing Dt:
02/01/2007
Publication #:
US20070147559
Pub Dt:
06/28/2007
Title:
OPERATING FREQUENCY REDUCTION FOR TRANSVERSAL FIR FILTER
2
Patent #:
7940839
Issue Dt:
05/10/2011
Application #:
10597455
Filing Dt:
07/10/2008
Publication #:
US20080260016
Pub Dt:
10/23/2008
Title:
FULLY ADAPTIVE EQUALIZATION FOR HIGH LOSS COMMUNICATIONS CHANNELS
3
Patent #:
8081677
Issue Dt:
12/20/2011
Application #:
11720024
Filing Dt:
01/09/2008
Publication #:
US20080240223
Pub Dt:
10/02/2008
Title:
RECEIVER-BASED ADAPTIVE EQUALIZER WITH PRE-CURSOR COMPENSATION
4
Patent #:
7796652
Issue Dt:
09/14/2010
Application #:
11790707
Filing Dt:
04/27/2007
Publication #:
US20070258491
Pub Dt:
11/08/2007
Title:
PROGRAMMABLE ASYNCHRONOUS FIRST-IN-FIRST-OUT (FIFO) STRUCTURE WITH MERGING CAPABILITY
5
Patent #:
7777581
Issue Dt:
08/17/2010
Application #:
11984852
Filing Dt:
11/23/2007
Publication #:
US20090102525
Pub Dt:
04/23/2009
Title:
VOLTAGE CONTROLLED OSCILLATOR (VCO) WITH A WIDE TUNING RANGE AND SUBSTANTIALLY CONSTANT VOLTAGE SWING OVER THE TUNING RANGE
6
Patent #:
8218705
Issue Dt:
07/10/2012
Application #:
12081380
Filing Dt:
04/15/2008
Publication #:
US20090103675
Pub Dt:
04/23/2009
Title:
LINEAR PHASE INTERPOLATOR AND PHASE DETECTOR
7
Patent #:
8315349
Issue Dt:
11/20/2012
Application #:
12258440
Filing Dt:
10/26/2008
Publication #:
US20090110136
Pub Dt:
04/30/2009
Title:
BANG-BANG PHASE DETECTOR WITH SUB-RATE CLOCK
8
Patent #:
7902886
Issue Dt:
03/08/2011
Application #:
12259315
Filing Dt:
10/28/2008
Publication #:
US20090115472
Pub Dt:
05/07/2009
Title:
MULTIPLE REFERENCE PHASE LOCKED LOOP
9
Patent #:
8452917
Issue Dt:
05/28/2013
Application #:
12559185
Filing Dt:
09/14/2009
Publication #:
US20100070690
Pub Dt:
03/18/2010
Title:
LOAD REDUCTION DUAL IN-LINE MEMORY MODULE (LRDIMM) AND METHOD FOR PROGRAMMING THE SAME
10
Patent #:
8713379
Issue Dt:
04/29/2014
Application #:
13303048
Filing Dt:
11/22/2011
Publication #:
US20120204079
Pub Dt:
08/09/2012
Title:
SYSTEM AND METHOD OF INTERFACING CO-PROCESSORS AND INPUT/OUTPUT DEVICES VIA A MAIN MEMORY SYSTEM
11
Patent #:
8738853
Issue Dt:
05/27/2014
Application #:
13873633
Filing Dt:
04/30/2013
Publication #:
US20130238849
Pub Dt:
09/12/2013
Title:
LOAD REDUCTION DUAL IN-LINE MEMORY MODULE (LRDIMM) AND METHOD FOR PROGRAMMING THE SAME
12
Patent #:
8972805
Issue Dt:
03/03/2015
Application #:
14247162
Filing Dt:
04/07/2014
Publication #:
US20140223262
Pub Dt:
08/07/2014
Title:
System and Method of Interfacing Co-Processors and Input/Output Devices via a Main Memory System
13
Patent #:
9575908
Issue Dt:
02/21/2017
Application #:
14265241
Filing Dt:
04/29/2014
Publication #:
US20140237176
Pub Dt:
08/21/2014
Title:
SYSTEM AND METHOD FOR UNLOCKING ADDITIONAL FUNCTIONS OF A MODULE
14
Patent #:
9779020
Issue Dt:
10/03/2017
Application #:
14265270
Filing Dt:
04/29/2014
Publication #:
US20140237157
Pub Dt:
08/21/2014
Title:
SYSTEM AND METHOD FOR PROVIDING AN ADDRESS CACHE FOR MEMORY MAP LEARNING
15
Patent #:
9552175
Issue Dt:
01/24/2017
Application #:
14265280
Filing Dt:
04/29/2014
Publication #:
US20140237205
Pub Dt:
08/21/2014
Title:
SYSTEM AND METHOD FOR PROVIDING A COMMAND BUFFER IN A MEMORY SYSTEM
16
Patent #:
9015408
Issue Dt:
04/21/2015
Application #:
14270293
Filing Dt:
05/05/2014
Publication #:
US20140244924
Pub Dt:
08/28/2014
Title:
LOAD REDUCTION DUAL IN-LINE MEMORY MODULE (LRDIMM) AND METHOD FOR PROGRAMMING THE SAME
17
Patent #:
NONE
Issue Dt:
Application #:
14271773
Filing Dt:
05/07/2014
Publication #:
US20150324281
Pub Dt:
11/12/2015
Title:
SYSTEM AND METHOD OF IMPLEMENTING AN OBJECT STORAGE DEVICE ON A COMPUTER MAIN MEMORY SYSTEM
18
Patent #:
NONE
Issue Dt:
Application #:
14271838
Filing Dt:
05/07/2014
Publication #:
US20150326684
Pub Dt:
11/12/2015
Title:
SYSTEM AND METHOD OF ACCESSING AND CONTROLLING A CO-PROCESSOR AND/OR INPUT/OUTPUT DEVICE VIA REMOTE DIRECT MEMORY ACCESS
19
Patent #:
NONE
Issue Dt:
Application #:
14289547
Filing Dt:
05/28/2014
Publication #:
US20150347151
Pub Dt:
12/03/2015
Title:
SYSTEM AND METHOD FOR BOOTING FROM A NON-VOLATILE MEMORY
20
Patent #:
NONE
Issue Dt:
Application #:
14452473
Filing Dt:
08/05/2014
Publication #:
US20160041933
Pub Dt:
02/11/2016
Title:
SYSTEM AND METHOD FOR IMPLEMENTING A MULTI-THREADED DEVICE DRIVER IN A COMPUTER SYSTEM
21
Patent #:
NONE
Issue Dt:
Application #:
14452477
Filing Dt:
08/05/2014
Publication #:
US20160041917
Pub Dt:
02/11/2016
Title:
SYSTEM AND METHOD FOR MIRRORING A VOLATILE MEMORY OF A COMPUTER SYSTEM
Assignor
1
DIABLO TECHNOLOGIES, INC.
Exec Dt:
02/17/2015
Assignee
1
CITY NATIONAL BANK
200 CLARENDON STREET, 28TH FLOOR
BOSTON, MASSACHUSETTS 02116
Correspondence name and address
DIANA SANCHEZ BENTZ, LEGAL SPECIALIST
VLP LAW GROUP LLP
235 VICTORIA DRIVE
GILROY, CA 95020

Search Results as of: 09/22/2024 05:43 AM
If you have any comments or questions concerning the data displayed, contact PRD / Assignments at 571-272-3350. v.2.6
Web interface last modified: August 25, 2017 v.2.6
| .HOME | INDEX| SEARCH | eBUSINESS | CONTACT US | PRIVACY STATEMENT