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Patent #:
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Issue Dt:
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01/16/2007
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Application #:
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10687591
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Filing Dt:
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10/20/2003
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Publication #:
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Pub Dt:
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04/01/2004
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Title:
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MEMORY SYSTEM
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Patent #:
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Issue Dt:
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12/06/2005
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Application #:
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10694997
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Filing Dt:
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10/29/2003
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Publication #:
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Pub Dt:
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04/01/2004
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Title:
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SEMICONDUCTOR INTEGRATED CIRCUIT HAVING REDUCED CROSS-TALK NOISE
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Patent #:
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Issue Dt:
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11/08/2005
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Application #:
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10704684
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Filing Dt:
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11/12/2003
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Publication #:
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Pub Dt:
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06/03/2004
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Title:
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SEMICONDUCTOR DEVICE HAVING INTERCONNECTION LAYER WITH MULTIPLY LAYERED SIDEWALL INSULATION FILM
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Patent #:
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Issue Dt:
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05/25/2010
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Application #:
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10725587
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Filing Dt:
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12/03/2003
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Publication #:
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Pub Dt:
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06/02/2005
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Title:
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INTERFACE DEVICE AND INTERFACE DEVICE CONTROL METHOD
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Patent #:
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Issue Dt:
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09/27/2005
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Application #:
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10772268
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Filing Dt:
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02/06/2004
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Publication #:
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Pub Dt:
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08/12/2004
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Title:
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REGISTER SETTING METHOD AND SEMICONDUCTOR DEVICE
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Patent #:
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Issue Dt:
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04/21/2009
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Application #:
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10873223
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Filing Dt:
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06/23/2004
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Publication #:
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Pub Dt:
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11/11/2004
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Title:
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FUNDAMENTAL CELL, SEMICONDUCTOR INTEGRATED CIRCUIT DEVICE, WIRING METHOD AND WIRING APPARATUS
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Patent #:
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Issue Dt:
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04/22/2008
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Application #:
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10914141
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Filing Dt:
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08/10/2004
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Publication #:
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Pub Dt:
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01/13/2005
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Title:
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SEMICONDUCTOR INTEGRATED CIRCUIT HAVING REDUCED CROSS-TALK NOISE
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Patent #:
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Issue Dt:
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03/04/2008
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Application #:
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10914163
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Filing Dt:
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08/10/2004
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Publication #:
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Pub Dt:
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01/13/2005
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Title:
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SEMICONDUCTOR INTEGRATED CIRCUIT HAVING REDUCED CROSS-TALK NOISE
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Patent #:
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Issue Dt:
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01/08/2008
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Application #:
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11143649
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Filing Dt:
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06/03/2005
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Publication #:
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Pub Dt:
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10/06/2005
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Title:
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SEMICONDUCTOR APPARATUS HAVING A LARGE-SIZE BUS CONNECTION
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Patent #:
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Issue Dt:
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12/04/2007
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Application #:
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11247245
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Filing Dt:
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10/12/2005
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Publication #:
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Pub Dt:
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02/09/2006
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Title:
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TEST METHOD OF SEMICONDUCTOR DEVICES
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Patent #:
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Issue Dt:
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01/06/2009
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Application #:
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11480904
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Filing Dt:
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07/06/2006
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Publication #:
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Pub Dt:
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11/09/2006
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Title:
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VOLTAGE GENERATOR CIRCUIT AND METHOD FOR CONTROLLING THEREOF
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Patent #:
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Issue Dt:
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11/11/2014
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Application #:
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11505835
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Filing Dt:
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08/18/2006
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Publication #:
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Pub Dt:
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12/14/2006
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Title:
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Memory system having a plurality of types of memory chips and a memory controller for controlling the memory chips
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Patent #:
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Issue Dt:
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06/10/2008
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Application #:
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11505837
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Filing Dt:
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08/18/2006
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Publication #:
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Pub Dt:
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12/14/2006
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Title:
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MEMORY SYSTEM
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Patent #:
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Issue Dt:
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05/06/2008
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Application #:
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11505838
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Filing Dt:
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08/18/2006
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Publication #:
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Pub Dt:
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12/14/2006
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Title:
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MEMORY SYSTEM
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Patent #:
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Issue Dt:
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03/22/2011
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Application #:
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11512319
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Filing Dt:
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08/30/2006
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Publication #:
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Pub Dt:
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12/28/2006
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Title:
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MULTI-PORT MEMORY BASED ON DRAM CORE
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Patent #:
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Issue Dt:
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06/08/2010
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Application #:
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11647363
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Filing Dt:
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12/29/2006
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Publication #:
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Pub Dt:
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07/19/2007
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Title:
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TESTING APPARATUS AND TESTING METHOD FOR AN INTEGRATED CIRCUIT, AND INTEGRATED CIRCUIT
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Patent #:
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Issue Dt:
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03/15/2011
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Application #:
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11984932
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Filing Dt:
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11/26/2007
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Publication #:
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Pub Dt:
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06/19/2008
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Title:
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SEMICONDUCTOR APPARATUS HAVING A LARGE-SIZE BUS CONNECTION
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Patent #:
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Issue Dt:
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03/22/2011
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Application #:
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12071845
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Filing Dt:
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02/27/2008
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Publication #:
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Pub Dt:
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12/04/2008
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Title:
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METHOD FOR DETERMINING A LENGTH OF SHIELDING OF A SEMICONDUCTOR INTEGRATED CIRCUIT WIRING
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Patent #:
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Issue Dt:
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03/25/2014
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Application #:
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12631240
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Filing Dt:
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12/04/2009
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Publication #:
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Pub Dt:
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06/10/2010
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Title:
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MEMORY SYSTEM HAVING A PLURALITY OF TYPES OF MEMORY CHIPS AND A MEMORY CONTROLLER FOR CONTROLLING THE MEMORY CHIPS
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Patent #:
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Issue Dt:
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11/13/2012
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Application #:
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12631288
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Filing Dt:
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12/04/2009
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Publication #:
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Pub Dt:
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06/10/2010
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Title:
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MEMORY SYSTEM HAVING A PLURALITY OF TYPES OF MEMORY CHIPS AND A MEMORY CONTROLLER FOR CONTROLLING THE MEMORY CHIPS
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Patent #:
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Issue Dt:
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10/01/2013
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Application #:
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13031080
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Filing Dt:
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02/18/2011
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Publication #:
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Pub Dt:
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06/16/2011
| | | | |
Title:
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MULTI-PORT MEMORY BASED ON DRAM CORE
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Patent #:
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Issue Dt:
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05/06/2014
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Application #:
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13601406
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Filing Dt:
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08/31/2012
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Publication #:
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Pub Dt:
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08/08/2013
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Title:
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MULTI-PORT MEMORY BASED ON DRAM CORE
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Patent #:
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Issue Dt:
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04/01/2014
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Application #:
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13601475
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Filing Dt:
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08/31/2012
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Publication #:
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Pub Dt:
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08/08/2013
| | | | |
Title:
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MULTI-PORT MEMORY BASED ON DRAM CORE
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