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NOTE:Results display only for issued patents and published applications. For pending or abandoned applications please consult USPTO staff.

Reel/Frame:054738/0855   Pages: 15
Recorded: 12/23/2020
Attorney Dkt #:2068279-5187
Conveyance: SECURITY INTEREST (SEE DOCUMENT FOR DETAILS).
Total properties: 39
1
Patent #:
6707756
Issue Dt:
03/16/2004
Application #:
10097687
Filing Dt:
03/12/2002
Publication #:
US20030174569
Pub Dt:
09/18/2003
Title:
SYSTEM AND METHOD FOR TRANSLATION OF SDRAM AND DDR SIGNALS
2
Patent #:
8250295
Issue Dt:
08/21/2012
Application #:
10752151
Filing Dt:
01/05/2004
Publication #:
US20060117152
Pub Dt:
06/01/2006
Title:
MULTI-RANK MEMORY MODULE THAT EMULATES A MEMORY MODULE HAVING A DIFFERENT NUMBER OF RANKS
3
Patent #:
7623355
Issue Dt:
11/24/2009
Application #:
11075407
Filing Dt:
03/07/2005
Publication #:
US20060198113
Pub Dt:
09/07/2006
Title:
EXTENDED UNIVERSAL SERIAL BUS CONNECTIVITY
4
Patent #:
7724604
Issue Dt:
05/25/2010
Application #:
11552949
Filing Dt:
10/25/2006
Publication #:
US20080101147
Pub Dt:
05/01/2008
Title:
CLOCK AND POWER FAULT DETECTION FOR MEMORY MODULES
5
Patent #:
7937641
Issue Dt:
05/03/2011
Application #:
11643100
Filing Dt:
12/21/2006
Publication #:
US20080155378
Pub Dt:
06/26/2008
Title:
MEMORY MODULES WITH ERROR DETECTION AND CORRECTION
6
Patent #:
7956450
Issue Dt:
06/07/2011
Application #:
12416339
Filing Dt:
04/01/2009
Publication #:
US20100084753
Pub Dt:
04/08/2010
Title:
MULTI-CHIP PACKAGE
7
Patent #:
8379391
Issue Dt:
02/19/2013
Application #:
12465560
Filing Dt:
05/13/2009
Publication #:
US20090279243
Pub Dt:
11/12/2009
Title:
MEMORY MODULE WITH VERTICALLY ACCESSED INTERPOSER ASSEMBLIES
8
Patent #:
8644105
Issue Dt:
02/04/2014
Application #:
12770576
Filing Dt:
04/29/2010
Publication #:
US20100211765
Pub Dt:
08/19/2010
Title:
CLOCK AND POWER FAULT DETECTION FOR MEMORY MODULES
9
Patent #:
8068378
Issue Dt:
11/29/2011
Application #:
12770610
Filing Dt:
04/29/2010
Publication #:
US20100238754
Pub Dt:
09/23/2010
Title:
CLOCK AND POWER FAULT DETECTION FOR MEMORY MODULES
10
Patent #:
8423724
Issue Dt:
04/16/2013
Application #:
12878008
Filing Dt:
09/08/2010
Publication #:
US20120060009
Pub Dt:
03/08/2012
Title:
DYNAMIC BACK-UP STORAGE SYSTEM WITH RAPID RESTORE AND METHOD OF OPERATION THEREOF
11
Patent #:
10755757
Issue Dt:
08/25/2020
Application #:
12902073
Filing Dt:
10/11/2010
Publication #:
US20110125966
Pub Dt:
05/26/2011
Title:
MULTI-RANK MEMORY MODULE THAT EMULATES A MEMORY MODULE HAVING A DIFFERENT NUMBER OF RANKS
12
Patent #:
8767463
Issue Dt:
07/01/2014
Application #:
13207503
Filing Dt:
08/11/2011
Publication #:
US20130039128
Pub Dt:
02/14/2013
Title:
NON-VOLATILE DYNAMIC RANDOM ACCESS MEMORY SYSTEM WITH NON-DELAY-LOCK-LOOP MECHANISM AND METHOD OF OPERATION THEREOF
13
Patent #:
9684520
Issue Dt:
06/20/2017
Application #:
13277720
Filing Dt:
10/20/2011
Publication #:
US20130103887
Pub Dt:
04/25/2013
Title:
COMPUTING SYSTEM WITH NON-DISRUPTIVE FAST MEMORY RESTORE MECHANISM AND METHOD OF OPERATION THEREOF
14
Patent #:
9424188
Issue Dt:
08/23/2016
Application #:
13303818
Filing Dt:
11/23/2011
Publication #:
US20130132639
Pub Dt:
05/23/2013
Title:
NON-VOLATILE MEMORY PACKAGING SYSTEM WITH CACHING AND METHOD OF OPERATION THEREOF
15
Patent #:
9754634
Issue Dt:
09/05/2017
Application #:
13303863
Filing Dt:
11/23/2011
Publication #:
US20130128685
Pub Dt:
05/23/2013
Title:
MEMORY MANAGEMENT SYSTEM WITH POWER SOURCE AND METHOD OF MANUFACTURE THEREOF
16
Patent #:
8990489
Issue Dt:
03/24/2015
Application #:
13568694
Filing Dt:
08/07/2012
Publication #:
US20130036264
Pub Dt:
02/07/2013
Title:
MULTI-RANK MEMORY MODULE THAT EMULATES A MEMORY MODULE HAVING A DIFFERENT NUMBER OF RANKS
17
Patent #:
9204550
Issue Dt:
12/01/2015
Application #:
13633074
Filing Dt:
10/01/2012
Publication #:
US20130083473
Pub Dt:
04/04/2013
Title:
EXTENDED CAPACITY MEMORY SYSTEM WITH LOAD RELIEVED MEMORY AND METHOD OF MANUFACTURE THEREOF
18
Patent #:
9779016
Issue Dt:
10/03/2017
Application #:
13940118
Filing Dt:
07/11/2013
Title:
COMPUTING SYSTEM WITH BACKUP AND RECOVERY MECHANISM AND METHOD OF OPERATION THEREOF
19
Patent #:
8626998
Issue Dt:
01/07/2014
Application #:
13972337
Filing Dt:
08/21/2013
Title:
MULTI-RANK MEMORY MODULE THAT EMULATES A MEMORY MODULE HAVING A DIFFERENT NUMBER OF RANKS
20
Patent #:
9603252
Issue Dt:
03/21/2017
Application #:
14077908
Filing Dt:
11/12/2013
Title:
INTEGRATED CIRCUIT DEVICE SYSTEM WITH ELEVATED CONFIGURATION AND METHOD OF MANUFACTURE THEREOF
21
Patent #:
9648754
Issue Dt:
05/09/2017
Application #:
14231622
Filing Dt:
03/31/2014
Title:
INTEGRATED CIRCUIT DEVICE SYSTEM WITH ELEVATED STACKED CONFIGURATION AND METHOD OF MANUFACTURE THEREOF
22
Patent #:
10826989
Issue Dt:
11/03/2020
Application #:
14512624
Filing Dt:
10/13/2014
Publication #:
US20160105510
Pub Dt:
04/14/2016
Title:
DATA STORAGE SYSTEM WITH INFORMATION EXCHANGE MECHANISM AND METHOD OF OPERATION THEREOF
23
Patent #:
9576615
Issue Dt:
02/21/2017
Application #:
14884369
Filing Dt:
10/15/2015
Title:
MEMORY MODULE WITH POWER MANAGEMENT SYSTEM AND METHOD OF OPERATION THEREOF
24
Patent #:
9939855
Issue Dt:
04/10/2018
Application #:
14942787
Filing Dt:
11/16/2015
Publication #:
US20160070316
Pub Dt:
03/10/2016
Title:
EXTENDED CAPACITY MEMORY SYSTEM WITH LOAD RELIEVED MEMORY AND METHOD OF MANUFACTURE THEREOF
25
Patent #:
10877544
Issue Dt:
12/29/2020
Application #:
14994065
Filing Dt:
01/12/2016
Publication #:
US20170199684
Pub Dt:
07/13/2017
Title:
MEMORY MANAGEMENT SYSTEM WITH BACKUP SYSTEM AND METHOD OF OPERATION THEREOF
26
Patent #:
10534619
Issue Dt:
01/14/2020
Application #:
15055448
Filing Dt:
02/26/2016
Publication #:
US20170249156
Pub Dt:
08/31/2017
Title:
MEMORY MANAGEMENT SYSTEM WITH MULTIPLE BOOT DEVICES AND METHOD OF OPERATION THEREOF
27
Patent #:
9946469
Issue Dt:
04/17/2018
Application #:
15076433
Filing Dt:
03/21/2016
Publication #:
US20170269852
Pub Dt:
09/21/2017
Title:
SOLID STATE STORAGE SYSTEM WITH LATENCY MANAGEMENT MECHANISM AND METHOD OF OPERATION THEREOF
28
Patent #:
10409754
Issue Dt:
09/10/2019
Application #:
15141757
Filing Dt:
04/28/2016
Publication #:
US20170315949
Pub Dt:
11/02/2017
Title:
INTERCONNECTED MEMORY SYSTEM AND METHOD OF OPERATION THEREOF
29
Patent #:
10573354
Issue Dt:
02/25/2020
Application #:
15273385
Filing Dt:
09/22/2016
Publication #:
US20180081554
Pub Dt:
03/22/2018
Title:
HIGH DENSITY MEMORY MODULE SYSTEM
30
Patent #:
10338821
Issue Dt:
07/02/2019
Application #:
15285305
Filing Dt:
10/04/2016
Publication #:
US20180095661
Pub Dt:
04/05/2018
Title:
MEMORY CONTROLLER FOR HIGH LATENCY MEMORY DEVICES
31
Patent #:
10474362
Issue Dt:
11/12/2019
Application #:
15294678
Filing Dt:
10/14/2016
Publication #:
US20180107400
Pub Dt:
04/19/2018
Title:
FLASH-BASED BLOCK STORAGE SYSTEM WITH TRIMMED SPACE MANAGEMENT AND METHOD OF OPERATION THEREOF
32
Patent #:
10185609
Issue Dt:
01/22/2019
Application #:
15388704
Filing Dt:
12/22/2016
Publication #:
US20180181454
Pub Dt:
06/28/2018
Title:
VIRTUAL TIMER FOR DATA RETENTION
33
Patent #:
10529688
Issue Dt:
01/07/2020
Application #:
15462885
Filing Dt:
03/19/2017
Title:
INTEGRATED CIRCUIT DEVICE SYSTEM WITH ELEVATED CONFIGURATION AND METHOD OF MANUFACTURE THEREOF
34
Patent #:
10510432
Issue Dt:
12/17/2019
Application #:
15659420
Filing Dt:
07/25/2017
Title:
MEMORY MODULE TEST ADAPTER
35
Patent #:
10551892
Issue Dt:
02/04/2020
Application #:
15709257
Filing Dt:
09/19/2017
Title:
CENTRALIZED BACKUP POWER MODULE
36
Patent #:
10488892
Issue Dt:
11/26/2019
Application #:
15789041
Filing Dt:
10/20/2017
Title:
PORTABLE MODULE SYSTEM
37
Patent #:
10838806
Issue Dt:
11/17/2020
Application #:
15955566
Filing Dt:
04/17/2018
Publication #:
US20180232159
Pub Dt:
08/16/2018
Title:
SOLID STATE STORAGE SYSTEM WITH LATENCY MANAGEMENT MECHANISM AND METHOD OF OPERATION THEREOF
38
Patent #:
11182325
Issue Dt:
11/23/2021
Application #:
16889727
Filing Dt:
06/01/2020
Title:
MEMORY CENTRIC COMPUTING STORAGE CONTROLLER SYSTEM
39
Patent #:
11561739
Issue Dt:
01/24/2023
Application #:
16889729
Filing Dt:
06/01/2020
Title:
CATASTROPHIC EVENT MEMORY BACKUP SYSTEM
Assignor
1
SMART MODULAR TECHNOLOGIES, INC.
Exec Dt:
12/23/2020
Assignee
1
BANK OF AMERICA, N.A., AS AGENT
333 S. HOPE STREET, 19TH FLOOR
LOS ANGELES, CALIFORNIA 90071
Correspondence name and address
MCGUIREWOODS LLP
355 S. GRAND AVENUE, SUITE 4200
ATTENTION: Y.LEE, ESQ. (K. SALTRICK)
LOS ANGELES, CA 90071

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