Patent Assignment Details
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| Reel/Frame: | 019758/0858 | |
| Pages: | 2 |
| | Recorded: | 08/22/2007 | | |
| Conveyance: | ASSIGNMENT OF ASSIGNORS INTEREST (SEE DOCUMENT FOR DETAILS). |
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Total properties:
1
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Patent #:
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Issue Dt:
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10/13/2009
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Application #:
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11843032
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Filing Dt:
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08/22/2007
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Publication #:
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Pub Dt:
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05/01/2008
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Title:
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TIMING FAILURE REMEDYING APPARATUS FOR AN INTEGRATED CIRCUIT, TIMING FAILURE DIAGNOSING APPARATUS FOR AN INTEGRATED CIRCUIT, TIMING FAILURE DIAGNOSING METHOD FOR AN INTEGRATED CIRCUIT, INTEGRATED CIRCUIT, COMPUTER READABLE RECORDING MEDIUM RECORDED THEREON A TIMING
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Assignee
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| 1-1, KAMIKODANAKA 4-CHOME, NAKAHARA-KU |
| KAWASAKI-SHI, KANAGAWA 211-8588, JAPAN |
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Correspondence name and address
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STAAS & HALSEY LLP
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PAUL L. KRAVETZ
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1201 NEW YORK AVE., LN.W., 7TH FLOOR
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WASHINGTON, D.C. 20005
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