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Patent #:
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07/02/2013
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Application #:
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13010009
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Filing Dt:
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01/20/2011
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Publication #:
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Pub Dt:
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06/30/2011
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Title:
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GATE CONDUCTOR WITH A DIFFUSION BARRIER
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Patent #:
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Issue Dt:
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01/07/2014
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Application #:
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13012179
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Filing Dt:
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01/24/2011
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Publication #:
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Pub Dt:
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07/26/2012
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Title:
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DISCRETE SAMPLING BASED NONLINEAR CONTROL SYSTEM
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Patent #:
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Issue Dt:
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12/31/2013
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Application #:
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13026168
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Filing Dt:
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02/11/2011
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Publication #:
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Pub Dt:
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06/09/2011
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Title:
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POLY-OXYCARBOSILANE COMPOSITIONS FOR USE IN IMPRINT LITHOGRAPHY
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Patent #:
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Issue Dt:
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06/04/2013
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Application #:
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13031754
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Filing Dt:
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02/22/2011
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Publication #:
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Pub Dt:
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10/06/2011
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Title:
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METHOD, SYSTEM, AND DESIGN STRUCTURE FOR MAKING VOLTAGE ENVIRONMENT CONSISTENT FOR REUSED SUB MODULES IN CHIP DESIGN
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Patent #:
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Issue Dt:
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09/02/2014
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Application #:
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13041248
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Filing Dt:
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03/04/2011
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Publication #:
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Pub Dt:
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06/30/2011
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Title:
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METHOD AND SYSTEM FOR PROVIDING AN IMPROVED STORE-IN CACHE
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Patent #:
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Issue Dt:
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11/19/2013
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Application #:
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13050519
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Filing Dt:
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03/17/2011
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Publication #:
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Pub Dt:
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07/07/2011
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Title:
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POLYMERIC MATERIAL, METHOD OF FORMING THE POLYMERIC MATERIAL, AND MEHTOD OF FORMING A THIN FILM USING THE POLYMERIC MATERIAL
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Patent #:
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Issue Dt:
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08/20/2013
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Application #:
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13052956
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Filing Dt:
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03/21/2011
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Publication #:
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Pub Dt:
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07/14/2011
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Title:
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METHOD OF MANUFACTURING AN INTERCONNECT STRUCTURE FOR A SEMICONDUCTOR DEVICE
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Patent #:
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Issue Dt:
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11/08/2011
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Application #:
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13075552
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Filing Dt:
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03/30/2011
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Publication #:
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Pub Dt:
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07/21/2011
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Title:
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SOI BODY CONTACT USING E-DRAM TECHNOLOGY
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Patent #:
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Issue Dt:
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11/04/2014
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Application #:
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13076192
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Filing Dt:
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03/30/2011
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Publication #:
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Pub Dt:
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07/21/2011
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Title:
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METHOD AND APPARATUS FOR MANUFACTURING ELECTRONIC INTEGRATED CIRCUIT CHIP
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Patent #:
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Issue Dt:
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12/10/2013
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Application #:
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13077216
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Filing Dt:
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03/31/2011
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Publication #:
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Pub Dt:
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07/28/2011
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Title:
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METHOD OF PLACING A SEMICONDUCTING NANOSTRUCTURE AND SEMICONDUCTOR DEVICE INCLUDING THE SEMICONDUCTING NANOSTRUCTURE
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Patent #:
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Issue Dt:
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07/23/2013
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Application #:
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13078305
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Filing Dt:
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04/01/2011
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Publication #:
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Pub Dt:
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10/04/2012
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Title:
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MULTILAYERED LOW K CAP WITH CONFORMAL GAP FILL AND UV STABLE COMPRESSIVE STRESS PROPERTIES
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Patent #:
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Issue Dt:
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01/21/2014
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Application #:
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13079842
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Filing Dt:
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04/05/2011
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Publication #:
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Pub Dt:
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10/11/2012
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Title:
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Dynamically Tune Power Proxy Architectures
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Patent #:
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Issue Dt:
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03/25/2014
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Application #:
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13080773
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Filing Dt:
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04/06/2011
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Publication #:
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Pub Dt:
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10/13/2011
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Title:
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PROCESSING EXECUTION REQUESTS WITHIN DIFFERENT COMPUTING ENVIRONMENTS
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Patent #:
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Issue Dt:
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07/09/2013
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Application #:
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13093034
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Filing Dt:
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04/25/2011
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Publication #:
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Pub Dt:
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08/11/2011
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Title:
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SILICON-ON-INSULATOR SUBSTRATE WITH BUILT-IN SUBSTRATE JUNCTION
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Patent #:
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Issue Dt:
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08/19/2014
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Application #:
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13095969
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Filing Dt:
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04/28/2011
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Publication #:
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Pub Dt:
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08/18/2011
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Title:
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SILICON CHICKLET PEDESTAL
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Patent #:
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Issue Dt:
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12/03/2013
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Application #:
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13095973
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Filing Dt:
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04/28/2011
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Publication #:
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Pub Dt:
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08/18/2011
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Title:
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SILICON CHICKLET PEDESTAL
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Patent #:
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Issue Dt:
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01/28/2014
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Application #:
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13097307
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Filing Dt:
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04/29/2011
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Publication #:
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Pub Dt:
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08/18/2011
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Title:
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METHOD FOR FABRICATION OF CRYSTALLINE DIODES FOR RESISTIVE MEMORIES
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Patent #:
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Issue Dt:
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08/20/2013
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Application #:
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13103197
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Filing Dt:
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05/09/2011
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Publication #:
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Pub Dt:
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09/01/2011
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Title:
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METAL-GATE HIGH-K REFERENCE STRUCTURE
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Patent #:
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Issue Dt:
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09/24/2013
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Application #:
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13107515
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Filing Dt:
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05/13/2011
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Publication #:
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Pub Dt:
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09/08/2011
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Title:
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TECHNIQUE FOR ENHANCING TRANSISTOR PERFORMANCE BY TRANSISTOR SPECIFIC CONTACT DESIGN
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Patent #:
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Issue Dt:
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12/23/2014
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Application #:
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13116396
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Filing Dt:
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05/26/2011
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Publication #:
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Pub Dt:
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09/15/2011
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Title:
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SOI RADIO FREQUENCY SWITCH WITH ENHANCED SIGNAL FIDELITY AND ELECTRICAL ISOLATION
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Patent #:
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Issue Dt:
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11/05/2013
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Application #:
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13116416
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Filing Dt:
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05/26/2011
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Publication #:
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Pub Dt:
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09/15/2011
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Title:
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CHARGE BREAKDOWN AVOIDANCE FOR MIM ELEMENTS IN SOI BASE TECHNOLOGY AND METHOD
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Patent #:
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Issue Dt:
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06/24/2014
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Application #:
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13135031
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Filing Dt:
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06/23/2011
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Publication #:
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Pub Dt:
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01/05/2012
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Title:
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METHODS AND APPARATUS FOR SELECTIVE EPITAXY OF SI-CONTAINING MATERIALS AND SUBSTITUTIONALLY DOPED CRYSTALLINE SI-CONTAINING MATERIAL
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Patent #:
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Issue Dt:
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07/23/2013
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Application #:
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13164899
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Filing Dt:
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06/21/2011
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Publication #:
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Pub Dt:
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02/02/2012
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Title:
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METHOD OF CONTROLLING CRITICAL DIMENSIONS OF VIAS IN A METALLIZATION SYSTEM OF A SEMICONDUCTOR DEVICE DURING SILICON-ARC ETCH
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Patent #:
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Issue Dt:
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07/31/2012
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Application #:
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13167303
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Filing Dt:
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06/23/2011
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Publication #:
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Pub Dt:
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10/20/2011
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Title:
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STRUCTURE AND METHOD FOR MANUFACTURING ASYMMETRIC DEVICES
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Patent #:
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Issue Dt:
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06/04/2013
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Application #:
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13174841
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07/01/2011
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Publication #:
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Pub Dt:
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10/27/2011
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Title:
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HYBRID INTERCONNECT STRUCTURE FOR PERFORMANCE IMPROVEMENT AND RELIABILITY ENHANCEMENT
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Patent #:
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Issue Dt:
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05/14/2013
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Application #:
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13178587
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07/08/2011
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Publication #:
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Pub Dt:
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03/01/2012
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Title:
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RE-ESTABLISHING SURFACE CHARACTERISTICS OF SENSITIVE LOW-K DIELECTRICS IN MICROSTRUCTURE DEVICES BY USING AN IN SITU SURFACE MODIFICATION
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Patent #:
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Issue Dt:
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07/08/2014
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13183549
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07/15/2011
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Pub Dt:
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03/01/2012
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Title:
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OXIDE DEPOSITION BY USING A DOUBLE LINER APPROACH FOR REDUCING PATTERN DENSITY DEPENDENCE IN SOPHISTICATED SEMICONDUCTOR DEVICES
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02/26/2013
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13185055
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07/18/2011
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Pub Dt:
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11/10/2011
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Title:
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VERTICAL FIELD EFFECT TRANSISTOR ARRAYS AND METHODS FOR FABRICATION THEREOF
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03/04/2014
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13187076
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07/20/2011
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03/01/2012
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Title:
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SUBSTRATE DICING TECHNIQUE FOR SEPARATING SEMICONDUCTOR DIES WITH REDUCED AREA CONSUMPTION
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10/28/2014
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13195155
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08/01/2011
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11/17/2011
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Title:
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SCALING OF BIPOLAR TRANSISTORS
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03/24/2015
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13198107
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08/04/2011
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06/28/2012
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Title:
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HIGH-K METAL GATE ELECTRODE STRUCTURES FORMED BY CAP LAYER REMOVAL WITHOUT SACRIFICIAL SPACER
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11/01/2016
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13219144
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08/26/2011
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12/22/2011
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PATTERNABLE DIELECTRIC FILM STRUCTURE WITH IMPROVED LITHOGRAPHY AND METHOD OF FABRICATING SAME
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02/04/2014
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13219331
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08/26/2011
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02/28/2013
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Title:
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FABRICATION OF A SEMICONDUCTOR DEVICE WITH EXTENDED EPITAXIAL SEMICONDUCTOR REGIONS
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04/16/2013
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13220753
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08/30/2011
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12/22/2011
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Title:
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STRAIN-COMPENSATED FIELD EFFECT TRANSISTOR AND ASSOCIATED METHOD OF FORMING THE TRANSISTOR
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03/25/2014
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13226681
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09/07/2011
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01/12/2012
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Title:
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MULTIPATH SOLDERED THERMAL INTERFACE BETWEEN A CHIP AND ITS HEAT SINK
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05/21/2013
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13229250
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09/09/2011
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12/29/2011
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MECHANICALLY ROBUST METAL/LOW-k INTERCONNECTS
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11/04/2014
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13233064
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09/15/2011
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03/21/2013
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Title:
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INTEGRATED CIRCUIT STRUCTURE HAVING SELECTIVELY FORMED METAL CAP
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10/29/2013
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13237386
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09/20/2011
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01/12/2012
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Title:
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METHOD OF CONCETRATING SOLAR ENERGY
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08/07/2012
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13252152
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10/03/2011
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01/26/2012
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POLYSILICON PLUG BIPOLAR TRANSISTOR FOR PHASE CHANGE MEMORY
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07/23/2013
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10/04/2011
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01/26/2012
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NOVEL REWORKABLE UNDERFILLS FOR CERAMIC MCM C4 PROTECTION
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01/14/2014
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13278552
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10/21/2011
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04/25/2013
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CARBON NANOTUBE TRANSISTOR EMPLOYING EMBEDDED ELECTRODES
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07/16/2013
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13280853
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10/25/2011
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05/03/2012
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METHOD AND APPARATUS FOR TRACKING UNCERTAIN SIGNALS
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07/01/2014
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13281688
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10/26/2011
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05/02/2013
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HIGH SELECTIVITY NITRIDE ETCH PROCESS
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02/18/2014
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13281715
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10/26/2011
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05/02/2013
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HIGH ASPECT RATIO AND REDUCED UNDERCUT TRENCH ETCH PROCESS FOR A SEMICONDUCTOR SUBSTRATE
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03/25/2014
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10/28/2011
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02/16/2012
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METHODS FOR ENHANCING QUALITY OF PIXEL SENSOR IMAGE FRAMES FOR GLOBAL SHUTTER IMAGING
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08/20/2013
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11/15/2011
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05/16/2013
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PROCESS TO REMOVE NI AND PT RESIDUES FOR NIPTSI APPLICATIONS
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10/01/2013
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13301841
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11/22/2011
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03/22/2012
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SELF-FORMING TOP ANTI-REFLECTIVE COATING COMPOSITIONS AND, PHOTORESIST MIXTURES AND METHOD OF IMAGING USING SAME
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08/12/2014
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13326404
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12/15/2011
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04/05/2012
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Title:
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METHOD FOR USING A TOPCOAT COMPOSITION
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04/21/2015
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13346043
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01/09/2012
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07/11/2013
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Title:
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IN SITU DOPING AND DIFFUSIONLESS ANNEALING OF EMBEDDED STRESSOR REGIONS IN PMOS AND NMOS DEVICES
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07/15/2014
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13348101
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01/11/2012
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07/11/2013
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METHOD OF FORMING TRANSISTOR WITH INCREASED GATE WIDTH
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05/21/2013
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13349883
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01/13/2012
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05/10/2012
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FABRICATION OF SEMICONDUCTORS WITH HIGH-K/METAL GATE ELECTRODES
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07/16/2013
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13354715
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01/20/2012
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05/10/2012
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Title:
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METHOD AND DEVICE FOR SELECTIVELY ADDING TIMING MARGIN IN AN INTEGRATED CIRCUIT
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08/06/2013
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13354883
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01/20/2012
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05/24/2012
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Title:
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11/19/2013
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13355065
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01/20/2012
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05/10/2012
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Title:
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08/06/2013
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13355099
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01/20/2012
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05/17/2012
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Title:
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METHOD AND DEVICE FOR SELECTIVELY ADDING TIMING MARGIN IN AN INTEGRATED CIRCUIT
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12/17/2013
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13359032
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01/26/2012
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05/17/2012
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Title:
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01/01/2013
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13363944
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02/01/2012
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07/26/2012
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Title:
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RECESSED GATE CHANNEL WITH LOW VT CORNER
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06/03/2014
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13364759
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02/02/2012
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02/07/2013
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Title:
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METHOD AND STRUCTURE FOR ULTRA-HIGH DENSITY, HIGH DATA RATE FERROELECTRIC STORAGE DISK TECHNOLOGY USING STABILIZATION BY A SURFACE CONDUCTING LAYER
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12/31/2013
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13365577
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02/03/2012
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05/31/2012
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Title:
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01/14/2014
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13370898
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02/10/2012
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06/07/2012
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08/27/2013
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13396998
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02/15/2012
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06/07/2012
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Title:
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Template-Registered DiBlock Copolymer Mask for MRAM Device Formation
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05/27/2014
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13398481
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02/16/2012
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06/14/2012
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3D INTEGRATED CIRCUIT DEVICE FABRICATION WITH PRECISELY CONTROLLABLE SUBSTRATE REMOVAL
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01/14/2014
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13398505
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02/16/2012
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06/21/2012
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3D INTEGRATED CIRCUIT DEVICE FABRICATION WITH PRECISELY CONTROLLABLE SUBSTRATE REMOVAL
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01/07/2014
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13400900
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02/21/2012
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06/28/2012
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07/16/2013
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13406956
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02/28/2012
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06/21/2012
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PRECISION PEAK MATCHING IN LIQUID CHROMATOGRAPHY-MASS SPECTROSCOPY
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04/01/2014
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13414954
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03/08/2012
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07/05/2012
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ASYMMETRIC COMPLEMENTARY DIPOLE ILLUMINATOR
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05/27/2014
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13415106
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03/08/2012
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07/05/2012
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ASYMMETRIC COMPLEMENTARY DIPOLE ILLUMINATOR
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07/01/2014
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13415372
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03/08/2012
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07/05/2012
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METAL DENSITY AWARE SIGNAL ROUTING
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05/06/2014
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13417879
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03/12/2012
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07/05/2012
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Title:
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Continuously Referencing Signals Over Multiple Layers in Laminate Packages
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04/22/2014
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13419624
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03/14/2012
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07/05/2012
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METHOD AND STRUCTURE FOR FORMING CAPACITORS AND MEMORY DEVICES ON SEMICONDUCTOR-ON-INSULATOR (SOI) SUBSTRATES
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12/10/2013
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13423716
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03/19/2012
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10/04/2012
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Title:
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STRESSED SOURCE/DRAIN CMOS AND METHOD FOR FORMING SAME
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02/18/2014
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13423838
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03/19/2012
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08/16/2012
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ORGANIC GRADED SPIN ON BARC COMPOSITIONS FOR HIGH NA LITHOGRAPHY
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10/15/2013
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13425681
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03/21/2012
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07/26/2012
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BULK SUBSTRATE FET INTEGRATED ON CMOS SOI
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07/29/2014
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13426892
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03/22/2012
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03/28/2013
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REDUCING IMPEDANCE DISCONTINUITY IN PACKAGES
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08/12/2014
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13429981
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03/26/2012
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10/04/2012
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THREAD SERIALIZATION AND DISABLEMENT TOOL
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07/23/2013
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13431254
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03/27/2012
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07/26/2012
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PAD BONDING EMPLOYING A SELF-ALIGNED PLATED LINER FOR ADHESION ENHANCEMENT
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11/05/2013
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13431328
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03/27/2012
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07/19/2012
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METHOD AND STRUCTURE FOR PMOS DEVICES WITH HIGH K METAL GATE INTEGRATION AND SIGE CHANNEL ENGINEERING
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07/23/2013
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13432716
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03/28/2012
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07/26/2012
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08/12/2014
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13432963
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03/28/2012
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07/26/2012
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FORMING SEMICONDUCTOR CHIP CONNECTIONS
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08/12/2014
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13432966
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03/28/2012
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07/26/2012
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REMOVING MATERIAL FROM DEFECTIVE OPENING IN GLASS MOLD AND RELATED GLASS MOLD FOR INJECTION MOLDED SOLDER
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07/16/2013
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13438230
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04/03/2012
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07/26/2012
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MODULARIZED THREE-DIMENSIONAL CAPACITOR ARRAY
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09/24/2013
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13442087
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04/09/2012
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08/02/2012
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HIGH-K TRANSISTORS WITH LOW THRESHOLD VOLTAGE
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03/18/2014
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13442090
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04/09/2012
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08/02/2012
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HIGH-K TRANSISTORS WITH LOW THRESHOLD VOLTAGE
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06/24/2014
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13443427
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04/10/2012
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08/02/2012
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METHOD AND APPARATUS FOR SUB-PELLICLE DEFECT REDUCTION ON PHOTOMASKS
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10/22/2013
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13444193
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04/11/2012
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08/02/2012
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ELECTROSTATIC CHUCKING OF AN INSULATOR HANDLE SUBSTRATE
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10/14/2014
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13445194
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04/12/2012
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08/02/2012
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PHASE CHANGE MEMORY CELL ARRAY WITH SELF-CONVERGED BOTTOM ELECTRODE AND METHOD FOR MANUFACTURING
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08/19/2014
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13453165
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04/23/2012
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08/23/2012
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STRUCTURE AND METHOD TO FORM E-FUSE WITH ENHANCED CURRENT CROWDING
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05/21/2013
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13453262
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04/23/2012
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08/16/2012
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FRACTURING CONTINUOUS PHOTOLITHOGRAPHY MASKS
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07/08/2014
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13455616
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04/25/2012
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10/31/2013
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METHODS OF FORMING SELF-ALIGNED CONTACTS FOR A SEMICONDUCTOR DEVICE FORMED USING REPLACEMENT GATE TECHNIQUES
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07/02/2013
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13463879
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05/04/2012
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08/30/2012
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NI PLATING OF A BLM EDGE FOR PB-FREE C4 UNDERCUT CONTROL
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10/28/2014
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13466895
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05/08/2012
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11/14/2013
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INTEGRATED CIRCUITS AND PROCESSES FOR FORMING INTEGRATED CIRCUITS HAVING AN EMBEDDED ELECTRICAL INTERCONNECT WITHIN A SUBSTRATE
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06/03/2014
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13468083
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05/10/2012
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08/30/2012
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SEMICONDUCTOR DEVICE AND METHOD FOR PATTERNING VERTICAL CONTACTS AND METAL LINES IN A COMMON ETCH PROCESS
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07/09/2013
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13468270
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05/10/2012
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08/30/2012
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Structure and Method for Manufacturing Asymmetric Devices
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07/01/2014
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13469487
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05/11/2012
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09/06/2012
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ELECTRONIC DEVICE WITH AEROGEL THERMAL ISOLATION
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01/21/2014
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13471627
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05/15/2012
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09/06/2012
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SYSTEM AND METHOD TO IMPROVE CHIP YIELD, RELIABILITY AND PERFORMANCE
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02/18/2014
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13474090
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05/17/2012
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06/13/2013
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WAFER DICING EMPLOYING EDGE REGION UNDERFILL REMOVAL
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10/22/2013
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13474790
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05/18/2012
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09/13/2012
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TECHNIQUE TO CREATE A BURIED PLATE IN EMBEDDED DYNAMIC RANDOM ACCESS MEMORY DEVICE
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02/04/2014
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13475503
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05/18/2012
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11/22/2012
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LOW TEMPERATURE SELECTIVE EPITAXY OF SILICON GERMANIUM ALLOYS EMPLOYING CYCLIC DEPOSIT AND ETCH
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03/18/2014
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05/21/2012
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11/21/2013
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METHODS OF FORMING COPPER-BASED CONDUCTIVE STRUCTURES BY FORMING A COPPER-BASED SEED LAYER HAVING AN AS-DEPOSITED THICKNESS PROFILE AND THEREAFTER PERFORMING AN ETCHING PROCESS AND ELECTROLESS COPPER DEPOSITION
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04/08/2014
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13476860
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05/21/2012
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11/21/2013
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METHODS FOR FORMING AN INTEGRATED CIRCUIT WITH STRAIGHTENED RECESS PROFILE
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