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Patent #:
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Issue Dt:
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01/10/2006
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Application #:
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10409543
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Filing Dt:
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04/08/2003
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Title:
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FIFO MEMORY WITH PROGRAMMABLE DATA PORT WIDTHS
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Patent #:
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Issue Dt:
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04/12/2005
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Application #:
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10417290
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Filing Dt:
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04/16/2003
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Title:
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PROGRAMMABLE LOGIC DEVICE ARCHITECTURE BASED ON ARRAYS OF LUT-BASED BOOLEAN TERMS
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Patent #:
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Issue Dt:
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05/17/2005
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Application #:
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10425862
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Filing Dt:
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04/28/2003
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Title:
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PROGRAMMABLE AND FIXED LOGIC CIRCUITRY FOR HIGH-SPEED INTERFACES
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Patent #:
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Issue Dt:
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06/07/2005
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Application #:
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10425863
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Filing Dt:
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04/28/2003
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Title:
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SCALABLE DEVICE ARCHITECTURE FOR HIGH-SPEED INTERFACES
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Patent #:
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Issue Dt:
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03/01/2005
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Application #:
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10428885
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Filing Dt:
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05/01/2003
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Title:
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CASCADED LOGIC BLOCK ARCHITECTURE FOR COMPLEX PROGRAMMABLE LOGIC DEVICES
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Patent #:
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Issue Dt:
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03/08/2005
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Application #:
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10428888
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Filing Dt:
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05/01/2003
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Title:
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MULTI-STAGE INTERCONNECT ARCHITECTURE FOR COMPLEX PROGRAMMABLE LOGIC DEVICES
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Patent #:
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Issue Dt:
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04/12/2005
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Application #:
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10428889
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Filing Dt:
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05/01/2003
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Title:
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CPLD WITH MULTI-FUNCTION BLOCKS AND DISTRIBUTED MEMORY
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Patent #:
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Issue Dt:
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07/26/2005
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Application #:
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10428982
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Filing Dt:
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05/01/2003
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Title:
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PROGRAMMABLE LOGIC DEVICE WITH ENHANCED WIDE AND DEEP LOGIC CAPABILITY
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Patent #:
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Issue Dt:
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12/07/2004
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Application #:
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10439602
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Filing Dt:
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05/16/2003
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Title:
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NON-VOLATILE AND RECONFIGURABLE PROGRAMMABLE LOGIC DEVICES
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Patent #:
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Issue Dt:
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05/02/2006
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Application #:
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10441814
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Filing Dt:
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05/19/2003
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Title:
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MEASURING PROPAGATION DELAYS OF PROGRAMMABLE LOGIC DEVICES
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Patent #:
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Issue Dt:
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11/27/2007
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Application #:
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10447120
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Filing Dt:
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05/28/2003
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Title:
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SKEW CANCELLATION FOR SOURCE SYNCHRONOUS CLOCK AND DATA SIGNALS
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Patent #:
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Issue Dt:
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03/07/2006
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Application #:
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10447451
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Filing Dt:
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05/28/2003
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Publication #:
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Pub Dt:
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12/02/2004
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Title:
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DIGITALLY CONTROLLED DELAY CELLS
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Patent #:
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Issue Dt:
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12/04/2007
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Application #:
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10457630
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Filing Dt:
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06/09/2003
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Title:
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INTEGRATED CIRCUIT INCLUDING EXTERNAL ELECTRONIC COMPONENTS WITH LOW INSERTION LOSS
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Patent #:
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Issue Dt:
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04/12/2005
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Application #:
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10459091
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Filing Dt:
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06/11/2003
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Publication #:
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Pub Dt:
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12/16/2004
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Title:
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FLEXIBLE MEDIA ACCESS CONTROL ARCHITECTURE
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Patent #:
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Issue Dt:
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02/15/2005
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Application #:
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10460385
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Filing Dt:
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06/11/2003
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Title:
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SYNCHRONIZATION OF PROGRAMMABLE MULTIPLEXERS AND DEMULTIPLEXERS
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Patent #:
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Issue Dt:
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03/01/2005
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Application #:
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10463781
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Filing Dt:
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06/16/2003
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Title:
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HIGH SPEED INTERFACE FOR A PROGRAMMABLE INTERCONNECT CIRCUIT
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Patent #:
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Issue Dt:
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04/19/2005
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Application #:
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10464083
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Filing Dt:
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06/18/2003
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Publication #:
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Pub Dt:
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12/23/2004
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Title:
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BI-DIRECTIONAL BUFFERING FOR MEMORY DATA LINES
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Patent #:
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Issue Dt:
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11/23/2004
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Application #:
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10600042
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Filing Dt:
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06/20/2003
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Title:
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INTEGRATED CIRCUIT AND ASSOCIATED DESIGN METHOD USING SPARE GATE ISLANDS
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Patent #:
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Issue Dt:
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12/20/2005
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Application #:
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10610253
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Filing Dt:
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06/30/2003
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Title:
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HIGH-PERFORMANCE NON-VOLATILE MEMORY DEVICE AND FABRICATION PROCESS
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Patent #:
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Issue Dt:
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11/07/2006
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Application #:
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10613460
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Filing Dt:
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07/03/2003
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Title:
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NOISE-SHIELDING, SWITCH-CONTROLLED LOAD CIRCUITRY FOR OSCILLATORS AND THE LIKE
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Patent #:
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Issue Dt:
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10/04/2005
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Application #:
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10613462
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Filing Dt:
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07/03/2003
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Title:
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PROGRAMMABLE I/O INTERFACES FOR FPGAS AND OTHER PLDS
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Patent #:
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Issue Dt:
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10/25/2005
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Application #:
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10617980
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Filing Dt:
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07/10/2003
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Title:
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PROGRAMMABLE LOGIC DEVICE WITH HARDWIRED MICROSEQUENCER
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Patent #:
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Issue Dt:
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08/29/2006
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Application #:
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10619645
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Filing Dt:
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07/14/2003
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Title:
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SCALABLE SERIALIZER-DESERIALIZER ARCHITECTURE AND PROGRAMMABLE INTERFACE
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Patent #:
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Issue Dt:
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06/07/2005
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Application #:
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10619711
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Filing Dt:
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07/14/2003
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Title:
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PROGRAMMABLE LOGIC DEVICE WITH ENHANCED WIDE INPUT PRODUCT TERM CASCADING
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Patent #:
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Issue Dt:
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04/18/2006
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Application #:
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10620147
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Filing Dt:
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07/14/2003
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Title:
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ALGORITHM TO INCREASE LOGIC INPUT WIDTH BY CASCADING PRODUCT TERMS
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Patent #:
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Issue Dt:
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07/19/2005
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Application #:
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10620286
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Filing Dt:
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07/14/2003
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Title:
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FIELD PROGRAMMABLE GATE ARRAY HAVING EMBEDDED MEMORY WITH CONFIGURABLE DEPTH AND WIDTH
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Patent #:
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Issue Dt:
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09/06/2005
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Application #:
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10624965
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Filing Dt:
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07/21/2003
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Title:
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PROGRAMMABLE LOGIC DEVICE WITH A MEMORY-BASED FINITE STATE MACHINE
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Patent #:
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Issue Dt:
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05/18/2004
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Application #:
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10626089
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Filing Dt:
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07/24/2003
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Title:
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ZERO POWER MEMORY CELL WITH REDUCED THRESHOLD VOLTAGE
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Patent #:
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Issue Dt:
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11/29/2005
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Application #:
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10628656
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Filing Dt:
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07/28/2003
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Title:
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PROGRAMMABLE LOCK DETECTOR AND CORRECTOR
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Patent #:
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Issue Dt:
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08/02/2005
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Application #:
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10628657
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Filing Dt:
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07/28/2003
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Title:
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PROGRAMMABLE SIGNAL TERMINATION FOR FPGAS AND THE LIKE
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Patent #:
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Issue Dt:
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04/26/2005
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Application #:
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10629221
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Filing Dt:
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07/29/2003
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Publication #:
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Pub Dt:
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02/03/2005
| | | | |
Title:
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CLOCK GENERATOR WITH SKEW CONTROL
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Patent #:
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Issue Dt:
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03/28/2006
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Application #:
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10629223
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Filing Dt:
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07/29/2003
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Publication #:
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Pub Dt:
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02/03/2005
| | | | |
Title:
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CLOCK GENERATOR
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Patent #:
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Issue Dt:
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06/07/2005
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Application #:
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10629512
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Filing Dt:
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07/29/2003
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Publication #:
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Pub Dt:
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02/03/2005
| | | | |
Title:
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MEMORY ACCESS VIA SERIAL MEMORY INTERFACE
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Patent #:
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Issue Dt:
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04/12/2005
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Application #:
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10640804
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Filing Dt:
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08/13/2003
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Title:
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INTEGRATED CIRCUIT AND ASSOCIATED DESIGN METHOD WITH ANTENNA ERROR CONTROL USING SPARE GATES
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Patent #:
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Issue Dt:
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01/04/2005
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Application #:
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10640828
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Filing Dt:
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08/13/2003
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Title:
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ENHANCED CPLD MACROCELL MODULE HAVING SELECTABLE BYPASS OF STEERING-BASED RESOURCE ALLOCATION
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Patent #:
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Issue Dt:
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09/06/2005
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Application #:
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10641260
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Filing Dt:
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08/13/2003
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Publication #:
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Pub Dt:
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02/17/2005
| | | | |
Title:
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PROGRAMMABLE BROADCAST INITIALIZATION OF MEMORY BLOCKS
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Patent #:
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Issue Dt:
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08/02/2005
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Application #:
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10642370
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Filing Dt:
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08/15/2003
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Publication #:
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Pub Dt:
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02/17/2005
| | | | |
Title:
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FIELD PROGRAMMABLE GATE ARRAY
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Patent #:
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Issue Dt:
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01/11/2005
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Application #:
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10655686
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Filing Dt:
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09/04/2003
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Title:
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SHARED TRANSMISSION LINE COMMUNICATION SYSTEM AND METHOD
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Patent #:
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Issue Dt:
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05/02/2006
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Application #:
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10660814
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Filing Dt:
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09/12/2003
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Title:
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DELAY-MATCHED ASIC CONVERSION OF A PROGRAMMABLE LOGIC DEVICE
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Patent #:
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Issue Dt:
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11/29/2005
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Application #:
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10665920
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Filing Dt:
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09/18/2003
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Title:
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CONTROLLED HYSTERESIS COMPARATOR WITH RAIL-TO-RAIL INPUT
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Patent #:
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Issue Dt:
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09/13/2005
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Application #:
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10671363
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Filing Dt:
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09/25/2003
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Title:
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PROGRAMMABLE I/O STRUCTURE FOR FPGAS AND THE LIKE HAVING SHARED CIRCUITRY
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Patent #:
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Issue Dt:
|
09/13/2005
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Application #:
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10671378
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Filing Dt:
|
09/25/2003
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Title:
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PROGRAMMABLE I/O STRUCTURE FOR FPGAS AND THE LIKE HAVING REDUCED PAD CAPACITANCE
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Patent #:
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Issue Dt:
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06/21/2005
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Application #:
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10671756
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Filing Dt:
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09/26/2003
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Title:
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MULTIPORT MEMORY WITH TWISTED BITLINES
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Patent #:
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Issue Dt:
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09/11/2007
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Application #:
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10676536
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Filing Dt:
|
09/30/2003
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Title:
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SEMICONDUCTOR DEVICE ADAPTED FOR FORMING MULTIPLE SCAN CHAINS
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Patent #:
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Issue Dt:
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10/26/2004
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Application #:
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10687468
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Filing Dt:
|
10/15/2003
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Title:
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ANALOG-TO-DIGITAL CONVERTERS
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Patent #:
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Issue Dt:
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06/27/2006
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Application #:
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10699321
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Filing Dt:
|
10/31/2003
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Publication #:
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Pub Dt:
|
05/05/2005
| | | | |
Title:
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LATERAL HIGH-VOLTAGE JUNCTION DEVICE
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Patent #:
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Issue Dt:
|
08/15/2006
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Application #:
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10701005
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Filing Dt:
|
11/03/2003
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Title:
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CLOCK GENERATION
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Patent #:
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Issue Dt:
|
08/08/2006
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Application #:
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10704025
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Filing Dt:
|
11/06/2003
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Title:
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PROGRAMMABLE LOGIC DEVICE WITH FLEXIBLE MEMORY ALLOCATION AND ROUTING
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Patent #:
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Issue Dt:
|
08/29/2006
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Application #:
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10726972
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Filing Dt:
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12/03/2003
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Title:
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PROGRAMMABLE POWER MANAGEMENT SYSTEM AND METHOD
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Patent #:
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Issue Dt:
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03/06/2007
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Application #:
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10728685
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Filing Dt:
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12/05/2003
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Title:
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POWER SUPPLY REMOTE VOLTAGE SENSING
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Patent #:
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Issue Dt:
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01/03/2006
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Application #:
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10737514
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Filing Dt:
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12/16/2003
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Title:
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LINEAR THERMOELECTRIC DEVICE DRIVER
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Patent #:
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Issue Dt:
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11/07/2006
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Application #:
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10744353
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Filing Dt:
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12/22/2003
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Title:
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METHOD FOR CONFIGURING MULTIPLE-OUTPUT PHASE-LOCKED LOOP FREQUENCY SYNTHESIZER
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Patent #:
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Issue Dt:
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03/28/2006
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Application #:
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10768643
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Filing Dt:
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01/30/2004
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Publication #:
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Pub Dt:
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08/04/2005
| | | | |
Title:
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OUTPUT STAGES FOR HIGH CURRENT LOW NOISE BANDGAP REFERENCE CIRCUIT IMPLEMENTATIONS
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Patent #:
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Issue Dt:
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04/04/2006
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Application #:
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10769174
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Filing Dt:
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01/29/2004
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Publication #:
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Pub Dt:
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08/04/2005
| | | | |
Title:
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ELECTROSTATIC DISCHARGE SIMULATION
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Patent #:
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Issue Dt:
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12/06/2005
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Application #:
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10782564
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Filing Dt:
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02/18/2004
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Publication #:
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Pub Dt:
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08/04/2005
| | | | |
Title:
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COMBINATION FIELD PROGRAMMABLE GATE ARRAY ALLOWING DYNAMIC REPROGRAMMABILITY AND NON-VOLATILE PROGRAMMABILITY BASED UPON TRANSISTOR GATE OXIDE BREAKDOWN
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Patent #:
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Issue Dt:
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07/25/2006
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Application #:
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10783886
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Filing Dt:
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02/20/2004
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Publication #:
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Pub Dt:
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09/01/2005
| | | | |
Title:
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UPGRADEABLE AND RECONFIGURABLE PROGRAMMABLE LOGIC DEVICE
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Patent #:
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Issue Dt:
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03/13/2007
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Application #:
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10791073
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Filing Dt:
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03/01/2004
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Title:
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FAST DIAGONAL INTERLEAVED PARITY (DIP) CALCULATOR
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Patent #:
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Issue Dt:
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08/14/2007
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Application #:
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10794079
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Filing Dt:
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03/04/2004
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Publication #:
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Pub Dt:
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09/08/2005
| | | | |
Title:
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TIMER SYSTEMS AND METHODS
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Patent #:
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Issue Dt:
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04/11/2006
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Application #:
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10794498
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Filing Dt:
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03/05/2004
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Publication #:
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Pub Dt:
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09/08/2005
| | | | |
Title:
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POWERING-UP A DEVICE HAVING DIGITAL AND ANALOG CIRCUITRY
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Patent #:
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Issue Dt:
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03/21/2006
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Application #:
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10794524
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Filing Dt:
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03/05/2004
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Publication #:
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Pub Dt:
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09/08/2005
| | | | |
Title:
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SYSTEMS AND METHODS FOR CONTROLLING VOLTAGE REGULATOR MODULE POWER SUPPLIES
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Patent #:
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Issue Dt:
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06/27/2006
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Application #:
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10797759
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Filing Dt:
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03/09/2004
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Publication #:
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Pub Dt:
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09/15/2005
| | | | |
Title:
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SENSE AMPLIFIER SYSTEMS AND METHODS
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Patent #:
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Issue Dt:
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06/19/2007
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Application #:
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10809180
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Filing Dt:
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03/25/2004
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Title:
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TABLE-BASED SCHEDULER FOR FIFOS AND THE LIKE
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Patent #:
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Issue Dt:
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08/22/2006
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Application #:
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10809658
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Filing Dt:
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03/25/2004
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Title:
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CONFIGURING FPGAS AND THE LIKE USING ONE OR MORE SERIAL MEMORY DEVICES
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Patent #:
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Issue Dt:
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01/23/2007
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Application #:
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10815403
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Filing Dt:
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03/31/2004
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Title:
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SELF-ADJUSTING SCHMITT TRIGGER
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Patent #:
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Issue Dt:
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07/25/2006
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Application #:
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10817215
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Filing Dt:
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04/02/2004
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Publication #:
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Pub Dt:
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10/06/2005
| | | | |
Title:
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CHARGE PUMP FOR A LOW-VOLTAGE WIDE-TUNING RANGE PHASE-LOCKED LOOP
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Patent #:
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Issue Dt:
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02/14/2006
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Application #:
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10829865
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Filing Dt:
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04/21/2004
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Title:
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DYNAMIC GAIN ADJUSTMENT SYSTEMS AND METHODS FOR METASTABILITY RESISTANCE
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Patent #:
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Issue Dt:
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02/14/2006
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Application #:
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10834528
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Filing Dt:
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04/29/2004
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Title:
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LOW PASS FILTER SYSTEMS AND METHODS
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Patent #:
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Issue Dt:
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12/11/2007
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Application #:
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10837086
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Filing Dt:
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04/30/2004
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Title:
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HIGH-VOLTAGE PROTECTION DEVICE AND PROCESS
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Patent #:
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Issue Dt:
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05/29/2007
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Application #:
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10841987
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Filing Dt:
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05/07/2004
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Publication #:
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Pub Dt:
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11/10/2005
| | | | |
Title:
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SWITCHED CAPACITOR RIPPLE-SMOOTHING FILTER
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Patent #:
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Issue Dt:
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02/21/2006
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Application #:
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10842345
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Filing Dt:
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05/07/2004
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Publication #:
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Pub Dt:
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11/10/2005
| | | | |
Title:
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CONTROL SIGNAL GENERATION FOR A LOW JITTER SWITCHED-CAPACITOR FREQUENCY SYNTHESIZER
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Patent #:
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Issue Dt:
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06/13/2006
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Application #:
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10843708
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Filing Dt:
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05/12/2004
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Title:
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I/O BUFFER ARCHITECTURE FOR PROGRAMMABLE DEVICES
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Patent #:
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Issue Dt:
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03/27/2007
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Application #:
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10856100
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Filing Dt:
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05/28/2004
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Publication #:
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Pub Dt:
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12/01/2005
| | | | |
Title:
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CURRENT MODE LOGIC BUFFER
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Patent #:
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Issue Dt:
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06/20/2006
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Application #:
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10857667
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Filing Dt:
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05/28/2004
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Publication #:
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Pub Dt:
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08/04/2005
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Title:
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COMBINATION FIELD PROGRAMMABLE GATE ARRAY ALLOWING DYNAMIC REPROGRAMMABILITY
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Patent #:
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Issue Dt:
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10/03/2006
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Application #:
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10885419
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Filing Dt:
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07/06/2004
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Publication #:
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Pub Dt:
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01/12/2006
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Title:
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MEMORY SYSTEMS AND METHODS
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Patent #:
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Issue Dt:
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05/08/2007
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Application #:
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10910091
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Filing Dt:
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08/03/2004
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Publication #:
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Pub Dt:
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02/09/2006
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Title:
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BYTE ENABLE LOGIC FOR MEMORY
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Patent #:
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Issue Dt:
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12/30/2008
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Application #:
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10912943
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Filing Dt:
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08/06/2004
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Publication #:
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Pub Dt:
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02/09/2006
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Title:
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DATA TRANSMISSION SYNCHRONIZATION
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Patent #:
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Issue Dt:
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07/18/2006
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Application #:
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10928563
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Filing Dt:
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08/27/2004
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Title:
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PROCESS FOR FABRICATING A SEMICONDUCTOR DEVICE HAVING ELECTRICALLY ISOLATED LOW VOLTAGE AND HIGH VOLTAGE REGIONS
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Patent #:
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Issue Dt:
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01/27/2009
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Application #:
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10929199
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Filing Dt:
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08/30/2004
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Publication #:
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Pub Dt:
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03/16/2006
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Title:
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TESTING EMBEDDED MEMORY IN AN INTEGRATED CIRCUIT
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Patent #:
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Issue Dt:
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11/14/2006
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Application #:
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10944978
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Filing Dt:
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09/20/2004
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Publication #:
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Pub Dt:
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03/23/2006
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Title:
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FIELD PROGRAMMABLE GATE ARRAYS USING BOTH VOLATILE AND NONVOLATILE MEMORY CELL PROPERTIES AND THEIR CONTROL
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Patent #:
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Issue Dt:
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12/12/2006
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Application #:
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10973750
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Filing Dt:
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10/25/2004
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Publication #:
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Pub Dt:
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04/27/2006
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Title:
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MEMORY OUTPUT DATA SYSTEMS AND METHODS WITH FEEDBACK
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Patent #:
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Issue Dt:
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01/16/2007
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Application #:
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10974107
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Filing Dt:
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10/26/2004
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Publication #:
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Pub Dt:
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12/15/2005
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Title:
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FIELD PROGRAMMABLE GATE ARRAY LOGIC UNIT AND ITS CLUSTER
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Patent #:
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Issue Dt:
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10/31/2006
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Application #:
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10974305
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Filing Dt:
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10/27/2004
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Title:
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PROGRAMMABLE LOGIC DEVICE HAVING A CONFIGURABLE DRAM WITH TRANSPARENT REFRESH
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Patent #:
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Issue Dt:
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12/11/2007
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Application #:
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10974453
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Filing Dt:
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10/25/2004
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Title:
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VARIABLE DATA WIDTH MEMORY SYSTEMS AND METHODS
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Patent #:
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Issue Dt:
|
05/20/2008
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Application #:
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10978899
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Filing Dt:
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11/01/2004
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Title:
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TESTING EMBEDDED MEMORY IN INTEGRATED CIRCUITS SUCH AS PROGRAMMABLE LOGIC CIRCUIT
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Patent #:
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Issue Dt:
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01/09/2007
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Application #:
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10996283
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Filing Dt:
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11/22/2004
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Title:
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LOW POWER ASYNCHRONOUS SENSE AMP
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Patent #:
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Issue Dt:
|
06/12/2007
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Application #:
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11007954
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Filing Dt:
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12/09/2004
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Title:
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DYNAMIC OVER-VOLTAGE PROTECTION SCHEME FOR INTEGRATED-CIRCUIT DEVICES
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Patent #:
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Issue Dt:
|
05/08/2007
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Application #:
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11012548
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Filing Dt:
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12/15/2004
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Title:
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PROGRAMMABLE CURRENT OUTPUT BUFFER
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Patent #:
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Issue Dt:
|
05/08/2007
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Application #:
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11012550
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Filing Dt:
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12/15/2004
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Title:
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INTERFACE CIRCUITRY FOR ELECTRICAL SYSTEMS
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Patent #:
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Issue Dt:
|
02/13/2007
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Application #:
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11015265
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Filing Dt:
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12/16/2004
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Title:
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INITIALIZING MEMORY BLOCKS
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Patent #:
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Issue Dt:
|
02/13/2007
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Application #:
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11015369
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Filing Dt:
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12/17/2004
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Title:
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SENSE AMPLIFIER TIMING
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Patent #:
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Issue Dt:
|
03/06/2007
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Application #:
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11016665
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Filing Dt:
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12/17/2004
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Title:
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CASCADABLE MEMORY
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|
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Patent #:
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Issue Dt:
|
08/14/2007
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Application #:
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11036630
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Filing Dt:
|
01/13/2005
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Title:
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SELF-VERIFICATION OF CONFIGURATION MEMORY IN PROGRAMMABLE LOGIC DEVICES
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Patent #:
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Issue Dt:
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07/10/2007
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Application #:
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11036738
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Filing Dt:
|
01/14/2005
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Title:
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EEPROM DEVICE WITH VOLTAGE-LIMITING CHARGE PUMP CIRCUIT
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Patent #:
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Issue Dt:
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04/24/2007
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Application #:
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11040772
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Filing Dt:
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01/20/2005
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Title:
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SERDES WITH PROGRAMMABLE I/O ARCHITECTURE
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Patent #:
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Issue Dt:
|
02/27/2007
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Application #:
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11041319
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Filing Dt:
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01/24/2005
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Title:
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SYNCHRONOUS MEMORY
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|
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Patent #:
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Issue Dt:
|
09/19/2006
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Application #:
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11044089
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Filing Dt:
|
01/27/2005
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Title:
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SYNCHRONIZATION OF PROGRAMMABLE MULTIPLEXERS AND DEMULTIPLEXERS
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|
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Patent #:
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Issue Dt:
|
09/19/2006
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Application #:
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11044149
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Filing Dt:
|
01/27/2005
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Title:
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SYNCHRONIZATION OF PROGRAMMABLE MULTIPLEXERS AND DEMULTIPLEXERS
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|
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Patent #:
|
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Issue Dt:
|
04/25/2006
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Application #:
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11044508
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Filing Dt:
|
01/27/2005
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Title:
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CLOCK GENERATOR WITH SKEW CONTROL
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|
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Patent #:
|
|
Issue Dt:
|
05/22/2007
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Application #:
|
11054011
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Filing Dt:
|
02/09/2005
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Title:
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MULTI-PORT MEMORY SYSTEMS AND METHODS FOR BIT LINE COUPLING
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|
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Patent #:
|
|
Issue Dt:
|
12/13/2005
|
Application #:
|
11055280
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Filing Dt:
|
02/10/2005
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Title:
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PROGRAMMABLE LOGIC DEVICES WITH INTEGRATED STANDARD-CELL LOGIC BLOCKS
|
|