Patent Assignment Details
NOTE:Results display only for issued patents and published applications.
For pending or abandoned applications please consult USPTO staff.
|
Reel/Frame: | 015352/0876 | |
| Pages: | 3 |
| | Recorded: | 11/08/2004 | | |
Attorney Dkt #: | M-15462 US |
Conveyance: | ASSIGNMENT OF ASSIGNORS INTEREST (SEE DOCUMENT FOR DETAILS). |
|
Total properties:
1
|
|
Patent #:
|
|
Issue Dt:
|
05/20/2008
|
Application #:
|
10978899
|
Filing Dt:
|
11/01/2004
|
Title:
|
TESTING EMBEDDED MEMORY IN INTEGRATED CIRCUITS SUCH AS PROGRAMMABLE LOGIC CIRCUIT
|
|
Assignee
|
|
|
5555 N.E. MOORE CT. |
HILLSBORO, OREGON |
|
Correspondence name and address
|
|
MACPHERSON, KWOK, CHEN & HEID LLP
|
|
JON W. HALLMAN
|
|
1762 TECHNOLOGY DRIVE, SUITE 226
|
|
SAN JOSE, CALIFORNIA 95110
|
Search Results as of:
09/23/2024 03:56 AM
If you have any comments or questions concerning the data displayed,
contact
PRD / Assignments at 571-272-3350. v.2.6
Web interface last modified:
August 25, 2017 v.2.6
|