Total properties:
80
|
|
Patent #:
|
|
Issue Dt:
|
01/26/2016
|
Application #:
|
13422981
|
Filing Dt:
|
03/16/2012
|
Publication #:
|
|
Pub Dt:
|
09/19/2013
| | | | |
Title:
|
SEMICONDUCTOR DEVICE AND METHOD OF FORMING COMPLIANT CONDUCTIVE INTERCONNECT STRUCTURE IN FLIPCHIP PACKAGE
|
|
|
Patent #:
|
NONE
|
Issue Dt:
|
|
Application #:
|
13424710
|
Filing Dt:
|
03/20/2012
|
Publication #:
|
|
Pub Dt:
|
09/26/2013
| | | | |
Title:
|
Semiconductor Device and Method of Forming Duplex Plated Bump-On-Lead Pad Over Substrate for Finer Pitch Between Adjacent Traces
|
|
|
Patent #:
|
|
Issue Dt:
|
12/02/2014
|
Application #:
|
13425349
|
Filing Dt:
|
03/20/2012
|
Publication #:
|
|
Pub Dt:
|
09/26/2013
| | | | |
Title:
|
SEMICONDUCTOR DEVICE AND METHOD OF FORMING CONDUCTIVE LAYER OVER METAL SUBSTRATE FOR ELECTRICAL INTERCONNECT OF SEMICONDUCTOR DIE
|
|
|
Patent #:
|
|
Issue Dt:
|
01/20/2015
|
Application #:
|
13426416
|
Filing Dt:
|
03/21/2012
|
Publication #:
|
|
Pub Dt:
|
09/26/2013
| | | | |
Title:
|
SEMICONDUCTOR DEVICE AND METHOD OF SINGULATING SEMICONDUCTOR WAFER ALONG MODIFIED REGION WITHIN NON-ACTIVE REGION FORMED BY IRRADIATING ENERGY THROUGH MOUNTING TAPE
|
|
|
Patent #:
|
|
Issue Dt:
|
07/29/2014
|
Application #:
|
13426552
|
Filing Dt:
|
03/21/2012
|
Publication #:
|
|
Pub Dt:
|
09/26/2013
| | | | |
Title:
|
SEMICONDUCTOR DEVICE AND METHOD OF FORMING MICRO-VIAS PARTIALLY THROUGH INSULATING MATERIAL OVER BUMP INTERCONNECT CONDUCTIVE LAYER FOR STRESS RELIEF
|
|
|
Patent #:
|
|
Issue Dt:
|
12/02/2014
|
Application #:
|
13426561
|
Filing Dt:
|
03/21/2012
|
Publication #:
|
|
Pub Dt:
|
09/26/2013
| | | | |
Title:
|
SEMICONDUCTOR DEVICE AND METHOD FOR FORMING OPENINGS AND TRENCHES IN INSULATING LAYER BY FIRST LDA AND SECOND LDA FOR RDL FORMATION
|
|
|
Patent #:
|
|
Issue Dt:
|
12/30/2014
|
Application #:
|
13426576
|
Filing Dt:
|
03/21/2012
|
Publication #:
|
|
Pub Dt:
|
09/26/2013
| | | | |
Title:
|
Semiconductor Device and Method of Simultaneous Testing of Multiple Interconnects for Electro-Migration
|
|
|
Patent #:
|
|
Issue Dt:
|
07/14/2015
|
Application #:
|
13428439
|
Filing Dt:
|
03/23/2012
|
Publication #:
|
|
Pub Dt:
|
09/26/2013
| | | | |
Title:
|
Semiconductor Device and Method of Forming a Robust Fan-Out Package including Vertical Interconnects and Mechanical Support Layer
|
|
|
Patent #:
|
|
Issue Dt:
|
08/19/2014
|
Application #:
|
13429119
|
Filing Dt:
|
03/23/2012
|
Publication #:
|
|
Pub Dt:
|
09/26/2013
| | | | |
Title:
|
SEMICONDUCTOR METHOD AND DEVICE OF FORMING A FAN-OUT POP DEVICE WITH PWB VERTICAL INTERCONNECT UNITS
|
|
|
Patent #:
|
|
Issue Dt:
|
07/12/2016
|
Application #:
|
13466945
|
Filing Dt:
|
05/08/2012
|
Publication #:
|
|
Pub Dt:
|
11/14/2013
| | | | |
Title:
|
Semiconductor Device and Method of Depositing Underfill Material With Uniform Flow Rate
|
|
|
Patent #:
|
|
Issue Dt:
|
08/02/2016
|
Application #:
|
13471314
|
Filing Dt:
|
05/14/2012
|
Publication #:
|
|
Pub Dt:
|
11/14/2013
| | | | |
Title:
|
Semiconductor Device and Method of Controlling Warpage in Semiconductor Package
|
|
|
Patent #:
|
NONE
|
Issue Dt:
|
|
Application #:
|
13477982
|
Filing Dt:
|
05/22/2012
|
Publication #:
|
|
Pub Dt:
|
09/26/2013
| | | | |
Title:
|
Semiconductor Method and Device of Forming a Fan-Out PoP Device with PWB Vertical Interconnect Units
|
|
|
Patent #:
|
|
Issue Dt:
|
07/26/2016
|
Application #:
|
13488029
|
Filing Dt:
|
06/04/2012
|
Publication #:
|
|
Pub Dt:
|
12/05/2013
| | | | |
Title:
|
SEMICONDUCTOR DEVICE AND METHOD OF BACKGRINDING AND SINGULATION OF SEMICONDUCTOR WAFER WHILE REDUCING KERF SHIFTING AND PROTECTING WAFER SURFACES
|
|
|
Patent #:
|
|
Issue Dt:
|
01/05/2016
|
Application #:
|
13489143
|
Filing Dt:
|
06/05/2012
|
Publication #:
|
|
Pub Dt:
|
12/05/2013
| | | | |
Title:
|
Semiconductor Device and Method of Reflow Soldering for Conductive Column Structure in Flip Chip Package
|
|
|
Patent #:
|
|
Issue Dt:
|
07/05/2016
|
Application #:
|
13529918
|
Filing Dt:
|
06/21/2012
|
Publication #:
|
|
Pub Dt:
|
12/26/2013
| | | | |
Title:
|
Semiconductor Device and Method of Forming an Embedded SOP Fan-Out Package
|
|
|
Patent #:
|
|
Issue Dt:
|
07/05/2016
|
Application #:
|
13630912
|
Filing Dt:
|
09/28/2012
|
Publication #:
|
|
Pub Dt:
|
04/03/2014
| | | | |
Title:
|
SEMICONDUCTOR DEVICE AND METHOD OF FORMING SUPPORTING LAYER OVER SEMICONDUCTOR DIE IN THIN FAN-OUT WAFER LEVEL CHIP SCALE PACKAGE
|
|
|
Patent #:
|
|
Issue Dt:
|
05/03/2016
|
Application #:
|
13653242
|
Filing Dt:
|
10/16/2012
|
Publication #:
|
|
Pub Dt:
|
04/17/2014
| | | | |
Title:
|
Semiconductor Device and Method of Forming Conductive Ink Layer as Interconnect Structure Between Semiconductor Packages
|
|
|
Patent #:
|
|
Issue Dt:
|
07/29/2014
|
Application #:
|
13791375
|
Filing Dt:
|
03/08/2013
|
Publication #:
|
|
Pub Dt:
|
10/03/2013
| | | | |
Title:
|
INTEGRATED CIRCUIT PACKAGING SYSTEM WITH ROUTABLE CIRCUITRY AND METHOD OF MANUFACTURE THEREOF
|
|
|
Patent #:
|
|
Issue Dt:
|
04/05/2016
|
Application #:
|
13795679
|
Filing Dt:
|
03/12/2013
|
Publication #:
|
|
Pub Dt:
|
02/27/2014
| | | | |
Title:
|
Semiconductor Device and Method of Forming RDL Using UV-Cured Conductive Ink Over Wafer Level Package
|
|
|
Patent #:
|
|
Issue Dt:
|
01/31/2017
|
Application #:
|
13800807
|
Filing Dt:
|
03/13/2013
|
Publication #:
|
|
Pub Dt:
|
03/20/2014
| | | | |
Title:
|
SEMICONDUCTOR DEVICE AND METHOD OF USING SUBSTRATE HAVING BASE AND CONDUCTIVE POSTS TO FORM VERTICAL INTERCONNECT STRUCTURE IN EMBEDDED DIE PACKAGE
|
|
|
Patent #:
|
|
Issue Dt:
|
07/05/2016
|
Application #:
|
13832118
|
Filing Dt:
|
03/15/2013
|
Publication #:
|
|
Pub Dt:
|
03/20/2014
| | | | |
Title:
|
Semiconductor Device and Method of Forming Build-Up Interconnect Structures Over Carrier for Testing at Interim Stages
|
|
|
Patent #:
|
|
Issue Dt:
|
01/29/2019
|
Application #:
|
13832205
|
Filing Dt:
|
03/15/2013
|
Publication #:
|
|
Pub Dt:
|
03/20/2014
| | | | |
Title:
|
Semiconductor Device and Method of Forming Dual-Sided Interconnect Structures in FO-WLCSP
|
|
|
Patent #:
|
|
Issue Dt:
|
05/22/2018
|
Application #:
|
13832449
|
Filing Dt:
|
03/15/2013
|
Publication #:
|
|
Pub Dt:
|
03/20/2014
| | | | |
Title:
|
SEMICONDUCTOR DEVICE AND METHOD OF FORMING DUAL-SIDED INTERCONNECT STRUCTURES IN FO-WLCSP
|
|
|
Patent #:
|
|
Issue Dt:
|
09/13/2016
|
Application #:
|
13832781
|
Filing Dt:
|
03/15/2013
|
Publication #:
|
|
Pub Dt:
|
03/20/2014
| | | | |
Title:
|
Semiconductor Device having Wire Studs as Vertical Interconnect in FO-WLP
|
|
|
Patent #:
|
|
Issue Dt:
|
11/15/2016
|
Application #:
|
13832809
|
Filing Dt:
|
03/15/2013
|
Publication #:
|
|
Pub Dt:
|
04/03/2014
| | | | |
Title:
|
Semiconductor Device and Method of Depositing Encapsulant Along Sides and Surface Edge of Semiconductor Die in Embedded WLCSP
|
|
|
Patent #:
|
|
Issue Dt:
|
06/28/2016
|
Application #:
|
13871157
|
Filing Dt:
|
04/26/2013
|
Publication #:
|
|
Pub Dt:
|
09/19/2013
| | | | |
Title:
|
SEMICONDUCTOR DEVICE AND METHOD OF MOUNTING COVER TO SEMICONDUCTOR DIE AND INTERPOSER WITH ADHESIVE MATERIAL
|
|
|
Patent #:
|
|
Issue Dt:
|
01/23/2018
|
Application #:
|
13874150
|
Filing Dt:
|
04/30/2013
|
Publication #:
|
|
Pub Dt:
|
09/19/2013
| | | | |
Title:
|
Semiconductor Device and Method for Forming Semiconductor Package Having Build-Up Interconnect Structure Over Semiconductor Die with Different CTE Insulating Layers
|
|
|
Patent #:
|
|
Issue Dt:
|
09/20/2016
|
Application #:
|
13886556
|
Filing Dt:
|
05/03/2013
|
Publication #:
|
|
Pub Dt:
|
09/19/2013
| | | | |
Title:
|
Semiconductor Device and Method of Forming Base Substrate with Recesses for Capturing Bumped Semiconductor Die
|
|
|
Patent #:
|
|
Issue Dt:
|
03/31/2015
|
Application #:
|
13887180
|
Filing Dt:
|
05/03/2013
|
Publication #:
|
|
Pub Dt:
|
09/19/2013
| | | | |
Title:
|
Semiconductor Device and Method of Forming Interposer and Opposing Build-Up Interconnect Structure with Connecting Conductive TMV for Electrical Interconnect of FO-WLCSP
|
|
|
Patent #:
|
|
Issue Dt:
|
02/24/2015
|
Application #:
|
13893616
|
Filing Dt:
|
05/14/2013
|
Publication #:
|
|
Pub Dt:
|
09/26/2013
| | | | |
Title:
|
METHOD OF FORMING RDL WIDER THAN CONTACT PAD ALONG FIRST AXIS AND NARROWER THAN CONTACT PAD ALONG SECOND
|
|
|
Patent #:
|
|
Issue Dt:
|
01/13/2015
|
Application #:
|
13896635
|
Filing Dt:
|
05/17/2013
|
Publication #:
|
|
Pub Dt:
|
09/26/2013
| | | | |
Title:
|
Semiconductor Device and Method of Forming Partially-Etched Conductive Layer Recessed Within Substrate for Bonding to Semiconductor Die
|
|
|
Patent #:
|
|
Issue Dt:
|
06/03/2014
|
Application #:
|
13905845
|
Filing Dt:
|
05/30/2013
|
Publication #:
|
|
Pub Dt:
|
10/10/2013
| | | | |
Title:
|
SEMICONDUCTOR DEVICE AND METHOD OF CONFINING CONDUCTIVE BUMP MATERIAL DURING REFLOW WITH SOLDER MASK PATCH
|
|
|
Patent #:
|
NONE
|
Issue Dt:
|
|
Application #:
|
13906060
|
Filing Dt:
|
05/30/2013
|
Publication #:
|
|
Pub Dt:
|
10/03/2013
| | | | |
Title:
|
Semiconductor Device and Method of Forming Reconstituted Wafer With Larger Carrier to Achieve More EWLB Packages Per Wafer with Encapsulant Deposited Under Temperature and Pressure
|
|
|
Patent #:
|
NONE
|
Issue Dt:
|
|
Application #:
|
13906489
|
Filing Dt:
|
05/31/2013
|
Publication #:
|
|
Pub Dt:
|
10/03/2013
| | | | |
Title:
|
Semiconductor Device and Method of Forming Protective Coating Material Over Semiconductor Wafer to Reduce Lamination Tape Residue
|
|
|
Patent #:
|
|
Issue Dt:
|
02/09/2016
|
Application #:
|
13906667
|
Filing Dt:
|
05/31/2013
|
Publication #:
|
|
Pub Dt:
|
10/03/2013
| | | | |
Title:
|
SEMICONDUCTOR DEVICE AND METHOD OF FORMING PREFABRICATED HEAT SPREADER FRAME WITH EMBEDDED SEMICONDUCTOR DIE
|
|
|
Patent #:
|
|
Issue Dt:
|
11/11/2014
|
Application #:
|
13906844
|
Filing Dt:
|
05/31/2013
|
Publication #:
|
|
Pub Dt:
|
10/10/2013
| | | | |
Title:
|
SEMICONDUCTOR DEVICE WITH BUMP FORMED ON SUBSTRATE TO PREVENT ELK ILD DELAMINATION DURING REFLOW PROCESS
|
|
|
Patent #:
|
|
Issue Dt:
|
10/27/2015
|
Application #:
|
13910786
|
Filing Dt:
|
06/05/2013
|
Publication #:
|
|
Pub Dt:
|
10/10/2013
| | | | |
Title:
|
SYSTEM-IN-PACKAGE HAVING INTEGRATED PASSIVE DEVICES AND METHOD THEREFOR
|
|
|
Patent #:
|
|
Issue Dt:
|
12/05/2017
|
Application #:
|
13917982
|
Filing Dt:
|
06/14/2013
|
Publication #:
|
|
Pub Dt:
|
10/24/2013
| | | | |
Title:
|
Semiconductor Method and Device of Forming a Fan-Out Device with PWB Vertical Interconnect Units
|
|
|
Patent #:
|
|
Issue Dt:
|
09/13/2016
|
Application #:
|
13933406
|
Filing Dt:
|
07/02/2013
|
Publication #:
|
|
Pub Dt:
|
10/31/2013
| | | | |
Title:
|
Semiconductor Device and Method of Forming a Thin Wafer Without a Carrier
|
|
|
Patent #:
|
|
Issue Dt:
|
07/05/2016
|
Application #:
|
13935053
|
Filing Dt:
|
07/03/2013
|
Publication #:
|
|
Pub Dt:
|
11/07/2013
| | | | |
Title:
|
SEMICONDUCTOR PACKAGE WITH EMBEDDED DIE
|
|
|
Patent #:
|
|
Issue Dt:
|
01/20/2015
|
Application #:
|
13935312
|
Filing Dt:
|
07/03/2013
|
Publication #:
|
|
Pub Dt:
|
11/07/2013
| | | | |
Title:
|
SEMICONDUCTOR DEVICE AND METHOD OF FORMING A SHIELDING LAYER OVER A SEMICONDUCTOR DIE DISPOSED IN A CAVITY OF AN INTERCONNECT STRUCTURE AND GROUNDED THROUGH THE DIE TSV
|
|
|
Patent #:
|
|
Issue Dt:
|
09/02/2014
|
Application #:
|
13935963
|
Filing Dt:
|
07/05/2013
|
Publication #:
|
|
Pub Dt:
|
11/07/2013
| | | | |
Title:
|
Semiconductor Device and Method of Forming Interconnect Structure and Mounting Semiconductor Die in Recessed Encapsulant
|
|
|
Patent #:
|
|
Issue Dt:
|
09/05/2017
|
Application #:
|
13936099
|
Filing Dt:
|
07/05/2013
|
Publication #:
|
|
Pub Dt:
|
11/07/2013
| | | | |
Title:
|
SEMICONDUCTOR DEVICE AND METHOD OF FORMING TSV SEMICONDUCTOR WAFER WITH EMBEDDED SEMICONDUCTOR DIE
|
|
|
Patent #:
|
|
Issue Dt:
|
08/30/2016
|
Application #:
|
13937849
|
Filing Dt:
|
07/09/2013
|
Publication #:
|
|
Pub Dt:
|
11/14/2013
| | | | |
Title:
|
SEMICONDUCTOR DEVICE AND METHOD OF FORMING PENETRABLE FILM ENCAPSULANT AROUND SEMICONDUCTOR DIE AND INTERCONNECT STRUCTURE
|
|
|
Patent #:
|
|
Issue Dt:
|
02/09/2021
|
Application #:
|
13937952
|
Filing Dt:
|
07/09/2013
|
Publication #:
|
|
Pub Dt:
|
11/07/2013
| | | | |
Title:
|
Semiconductor Device and Method of Forming Reconstituted Wafer with Larger Carrier to Achieve More EWLB Packages per Wafer with Encapsulant Deposited Under Temperature and Pressure
|
|
|
Patent #:
|
|
Issue Dt:
|
02/09/2016
|
Application #:
|
13939044
|
Filing Dt:
|
07/10/2013
|
Publication #:
|
|
Pub Dt:
|
11/14/2013
| | | | |
Title:
|
Semiconductor Device and Method of Forming Guard Ring Around Conductive TSV Through Semiconductor Wafer
|
|
|
Patent #:
|
|
Issue Dt:
|
10/06/2015
|
Application #:
|
13943735
|
Filing Dt:
|
07/16/2013
|
Publication #:
|
|
Pub Dt:
|
11/14/2013
| | | | |
Title:
|
Semiconductor Die and Method of Forming FO-WLCSP Vertical Interconnect Using TSV and TMV
|
|
|
Patent #:
|
|
Issue Dt:
|
02/16/2016
|
Application #:
|
13943737
|
Filing Dt:
|
07/16/2013
|
Publication #:
|
|
Pub Dt:
|
11/14/2013
| | | | |
Title:
|
SEMICONDUCTOR DEVICE AND METHOD OF FORMING OPEN CAVITY IN TSV INTERPOSER TO CONTAIN SEMICONDUCTOR DIE IN WLCSMP
|
|
|
Patent #:
|
|
Issue Dt:
|
05/03/2016
|
Application #:
|
13944783
|
Filing Dt:
|
07/17/2013
|
Publication #:
|
|
Pub Dt:
|
11/14/2013
| | | | |
Title:
|
Semiconductor Device and Method of Forming Through Vias with Reflowed Conductive Material
|
|
|
Patent #:
|
NONE
|
Issue Dt:
|
|
Application #:
|
13944825
|
Filing Dt:
|
07/17/2013
|
Publication #:
|
|
Pub Dt:
|
11/14/2013
| | | | |
Title:
|
Semiconductor Device and Method of Forming Interposer with Opening to Contain Semiconductor Die
|
|
|
Patent #:
|
|
Issue Dt:
|
03/07/2017
|
Application #:
|
14011491
|
Filing Dt:
|
08/27/2013
|
Publication #:
|
|
Pub Dt:
|
12/26/2013
| | | | |
Title:
|
SEMICONDUCTOR DEVICE AND METHOD OF FORMING A WAFER LEVEL PACKAGE WITH TOP AND BOTTOM SOLDER BUMP INTERCONNECTION
|
|
|
Patent #:
|
|
Issue Dt:
|
06/02/2015
|
Application #:
|
14017963
|
Filing Dt:
|
09/04/2013
|
Publication #:
|
|
Pub Dt:
|
01/02/2014
| | | | |
Title:
|
Semiconductor Device and Method of Embedding Thermally Conductive Layer in Interconnect Structure for Heat Dissipation
|
|
|
Patent #:
|
|
Issue Dt:
|
03/10/2015
|
Application #:
|
14018282
|
Filing Dt:
|
09/04/2013
|
Publication #:
|
|
Pub Dt:
|
01/02/2014
| | | | |
Title:
|
SEMICONDUCTOR DEVICE HAVING BALANCED BAND-PASS FILTER IMPLEMENTED WITH LC RESONATORS
|
|
|
Patent #:
|
|
Issue Dt:
|
07/22/2014
|
Application #:
|
14020996
|
Filing Dt:
|
09/09/2013
|
Publication #:
|
|
Pub Dt:
|
01/02/2014
| | | | |
Title:
|
SEMICONDUCTOR DEVICE AND METHOD OF FORMING MOLD UNDERFILL USING DISPENSING NEEDLE HAVING SAME WIDTH AS SEMICONDUCTOR DIE
|
|
|
Patent #:
|
|
Issue Dt:
|
11/18/2014
|
Application #:
|
14021056
|
Filing Dt:
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09/09/2013
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Publication #:
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Pub Dt:
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01/09/2014
| | | | |
Title:
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Semiconductor Device and Method of Forming Interconnect Structure Over Seed Layer on Contact Pad of Semiconductor Die Without Undercutting Seed Layer Beneath Interconnect Structure
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Patent #:
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Issue Dt:
|
06/13/2017
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Application #:
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14021206
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Filing Dt:
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09/09/2013
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Publication #:
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Pub Dt:
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01/09/2014
| | | | |
Title:
|
SEMICONDUCTOR DEVICE AND METHOD OF FORMING CAVITY ADJACENT TO SENSITIVE REGION OF SEMICONDUCTOR DIE USING WAFER-LEVEL UNDERFILL MATERIAL
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Patent #:
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|
Issue Dt:
|
07/19/2016
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Application #:
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14021208
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Filing Dt:
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09/09/2013
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Publication #:
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Pub Dt:
|
01/09/2014
| | | | |
Title:
|
Optical Semiconductor Device Having Pre-Molded Leadframe with Window and Method Therefor
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Patent #:
|
NONE
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Issue Dt:
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|
Application #:
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14021740
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Filing Dt:
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09/09/2013
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Publication #:
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Pub Dt:
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01/09/2014
| | | | |
Title:
|
Semiconductor Device and Method of Forming Electrical Interconnection Between Semiconductor Die and Substrate with Continuous Body of Solder Tape
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Patent #:
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Issue Dt:
|
06/23/2015
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Application #:
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14021914
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Filing Dt:
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09/09/2013
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Publication #:
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Pub Dt:
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01/09/2014
| | | | |
Title:
|
Semiconductor Device and Method of Forming Bump-on-Lead Interconnection
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Patent #:
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|
Issue Dt:
|
07/11/2017
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Application #:
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14038575
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Filing Dt:
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09/26/2013
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Publication #:
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Pub Dt:
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06/12/2014
| | | | |
Title:
|
Semiconductor Device and Method of Forming Low Profile Fan-Out Package with Vertical Interconnection Units
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Patent #:
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|
Issue Dt:
|
03/31/2015
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Application #:
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14043751
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Filing Dt:
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10/01/2013
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Publication #:
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Pub Dt:
|
01/30/2014
| | | | |
Title:
|
Semiconductor Device and Method of Forming Vertical Interconnect Structure with Conductive Micro Via Array for 3-D FO-WLCSP
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|
|
Patent #:
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|
Issue Dt:
|
08/14/2018
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Application #:
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14061244
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Filing Dt:
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10/23/2013
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Publication #:
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Pub Dt:
|
02/20/2014
| | | | |
Title:
|
SEMICONDUCTOR DEVICE AND METHOD OF FORMING A FAN-OUT POP DEVICE WITH PWB VERTICAL INTERCONNECT UNITS
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|
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Patent #:
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|
Issue Dt:
|
07/07/2015
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Application #:
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14063274
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Filing Dt:
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10/25/2013
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Publication #:
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Pub Dt:
|
02/20/2014
| | | | |
Title:
|
SEMICONDUCTOR DEVICE AND METHOD OF DUAL-MOLDING DIE FORMED ON OPPOSITE SIDES OF BUILD-UP INTERCONNECT STRUCTURE
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|
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Patent #:
|
|
Issue Dt:
|
03/08/2016
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Application #:
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14079273
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Filing Dt:
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11/13/2013
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Publication #:
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Pub Dt:
|
03/06/2014
| | | | |
Title:
|
Semiconductor Device and Method of Forming Thick Encapsulant for Stiffness with Recesses for Stress Relief in FO-WLCSP
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|
|
Patent #:
|
|
Issue Dt:
|
09/22/2015
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Application #:
|
14080609
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Filing Dt:
|
11/14/2013
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Publication #:
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Pub Dt:
|
03/20/2014
| | | | |
Title:
|
Semiconductor Device and Method of Forming FO-WLCSP with Multiple Encapsulants
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|
|
Patent #:
|
NONE
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Issue Dt:
|
|
Application #:
|
14082155
|
Filing Dt:
|
11/17/2013
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Publication #:
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|
Pub Dt:
|
03/13/2014
| | | | |
Title:
|
Semiconductor Device and Method of Forming Conductive THV and RDL on Opposite Sides of Semiconductor Die for RDL-to-RDL Bonding
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|
|
Patent #:
|
|
Issue Dt:
|
02/02/2016
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Application #:
|
14084745
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Filing Dt:
|
11/20/2013
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Publication #:
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|
Pub Dt:
|
03/13/2014
| | | | |
Title:
|
Semiconductor Device and Method of Forming Multi-Layered UBM with Intermediate Insulating Buffer Layer to Reduce Stress for Semiconductor Wafer
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|
|
Patent #:
|
|
Issue Dt:
|
09/22/2015
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Application #:
|
14087653
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Filing Dt:
|
11/22/2013
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Publication #:
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|
Pub Dt:
|
03/20/2014
| | | | |
Title:
|
Semiconductor Device with Protective Layer Over Exposed Surfaces of Semiconductor Die
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|
|
Patent #:
|
|
Issue Dt:
|
12/25/2018
|
Application #:
|
14090036
|
Filing Dt:
|
11/26/2013
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Publication #:
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|
Pub Dt:
|
03/27/2014
| | | | |
Title:
|
SEMICONDUCTOR DEVICE WITH DUMMY METAL PROTECTIVE STRUCTURE AROUND SEMICONDUCTOR DIE FOR LOCALIZED PLANARIZATION OF INSULATING LAYER
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|
|
Patent #:
|
|
Issue Dt:
|
06/14/2016
|
Application #:
|
14092304
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Filing Dt:
|
11/27/2013
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Publication #:
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|
Pub Dt:
|
03/27/2014
| | | | |
Title:
|
SEMICONDUCTOR DEVICE INCLUDING INTEGRATED PASSIVE DEVICE FORMED OVER SEMICONDUCTOR DIE WITH CONDUCTIVE BRIDGE AND FAN-OUT REDISTRIBUTION LAYER
|
|
|
Patent #:
|
|
Issue Dt:
|
04/11/2017
|
Application #:
|
14097534
|
Filing Dt:
|
12/05/2013
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Publication #:
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Pub Dt:
|
04/03/2014
| | | | |
Title:
|
SEMICONDUCTOR DEVICE AND METHOD OF USING A STANDARDIZED CARRIER IN SEMICONDUCTOR PACKAGING
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|
|
Patent #:
|
|
Issue Dt:
|
12/12/2017
|
Application #:
|
14135415
|
Filing Dt:
|
12/19/2013
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Publication #:
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|
Pub Dt:
|
04/17/2014
| | | | |
Title:
|
Semiconductor Device and Method of Forming a POP Device with Embedded Vertical Interconnect Units
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|
|
Patent #:
|
|
Issue Dt:
|
08/25/2015
|
Application #:
|
14138382
|
Filing Dt:
|
12/23/2013
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Publication #:
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|
Pub Dt:
|
04/17/2014
| | | | |
Title:
|
Semiconductor Device and Method of Forming Non-Linear Interconnect Layer with Extended Length for Joint Reliability
|
|
|
Patent #:
|
|
Issue Dt:
|
04/05/2016
|
Application #:
|
14138646
|
Filing Dt:
|
12/23/2013
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Publication #:
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|
Pub Dt:
|
04/24/2014
| | | | |
Title:
|
Semiconductor Package and Method of Mounting Semiconductor Die to Opposite Sides of TSV Substrate
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|
|
Patent #:
|
|
Issue Dt:
|
06/09/2015
|
Application #:
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14143891
|
Filing Dt:
|
12/30/2013
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Publication #:
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|
Pub Dt:
|
04/24/2014
| | | | |
Title:
|
Semiconductor Device and Method of Making TSV Interconnect Structures Using Encapsulant for Structural Support
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|
|
Patent #:
|
|
Issue Dt:
|
06/13/2017
|
Application #:
|
14144906
|
Filing Dt:
|
12/31/2013
|
Publication #:
|
|
Pub Dt:
|
04/24/2014
| | | | |
Title:
|
SEMICONDUCTOR DEVICE AND METHOD OF CONFINING CONDUCTIVE BUMP MATERIAL WITH SOLDER MASK PATCH
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|
|
Patent #:
|
|
Issue Dt:
|
06/16/2015
|
Application #:
|
14154049
|
Filing Dt:
|
01/13/2014
|
Publication #:
|
|
Pub Dt:
|
05/08/2014
| | | | |
Title:
|
EMBEDDED SEMICONDUCTOR DIE PACKAGE AND METHOD OF MAKING THE SAME USING METAL FRAME CARRIER
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|
|
Patent #:
|
|
Issue Dt:
|
12/22/2015
|
Application #:
|
14160796
|
Filing Dt:
|
01/22/2014
|
Publication #:
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|
Pub Dt:
|
05/15/2014
| | | | |
Title:
|
Semiconductor Device and Method of Self-Confinement of Conductive Bump Material During Reflow Without Solder Mask
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|
|
Patent #:
|
NONE
|
Issue Dt:
|
|
Application #:
|
14170295
|
Filing Dt:
|
01/31/2014
|
Publication #:
|
|
Pub Dt:
|
05/29/2014
| | | | |
Title:
|
Flip Chip Interconnection Structure
|
|
|
Patent #:
|
NONE
|
Issue Dt:
|
|
Application #:
|
14181429
|
Filing Dt:
|
02/14/2014
|
Publication #:
|
|
Pub Dt:
|
06/12/2014
| | | | |
Title:
|
Semiconductor Device Having High-Density Interconnect Array with Core Pillars Formed With OSP Coating
|
|