Total properties:
24
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Patent #:
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Issue Dt:
|
07/12/2005
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Application #:
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10383520
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Filing Dt:
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03/10/2003
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Publication #:
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Pub Dt:
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03/11/2004
| | | | |
Title:
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CACHE MEMORY FOR INVALIDATING DATA OR WRITING BACK DATA TO A MAIN MEMORY
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Patent #:
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Issue Dt:
|
01/10/2006
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Application #:
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10383522
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Filing Dt:
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03/10/2003
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Publication #:
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Pub Dt:
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03/25/2004
| | | | |
Title:
|
DELAY TIME CALCULATION APPARATUS AND INTEGRATED CIRCUIT DESIGN APPARATUS
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Patent #:
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Issue Dt:
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11/08/2005
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Application #:
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10383553
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Filing Dt:
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03/10/2003
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Publication #:
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Pub Dt:
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03/25/2004
| | | | |
Title:
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SEMICONDUCTOR INTEGRATED CIRCUIT DEVICE HAVING A TEST CIRCUIT OF A RANDOM ACCESS MEMORY
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Patent #:
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NONE
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Issue Dt:
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Application #:
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10387490
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Filing Dt:
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03/14/2003
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Publication #:
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Pub Dt:
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03/04/2004
| | | | |
Title:
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Semiconductor intellectual property transmission system
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Patent #:
|
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Issue Dt:
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09/14/2004
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Application #:
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10397352
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Filing Dt:
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03/27/2003
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Publication #:
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Pub Dt:
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04/15/2004
| | | | |
Title:
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THIN-FILM MAGNETIC MEMORY DEVICE SUPPRESSING PARASITIC CAPACITANCE APPLIED TO DATA LINE OR THE LIKE
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Patent #:
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Issue Dt:
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10/26/2004
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Application #:
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10408237
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Filing Dt:
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04/08/2003
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Publication #:
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Pub Dt:
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04/08/2004
| | | | |
Title:
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MULTIPORT MEMORY CIRCUIT COMPOSED OF 1TR-1C MEMORY CELLS
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Patent #:
|
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Issue Dt:
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07/27/2004
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Application #:
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10421928
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Filing Dt:
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04/24/2003
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Publication #:
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Pub Dt:
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11/06/2003
| | | | |
Title:
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SEMICONDUCTOR MEMORY DEVICE INCLUDING AN SOI SUBSTRATE
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Patent #:
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NONE
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Issue Dt:
|
|
Application #:
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10430276
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Filing Dt:
|
05/07/2003
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Publication #:
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Pub Dt:
|
12/23/2004
| | | | |
Title:
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Semiconductor integrated circuit
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|
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Patent #:
|
|
Issue Dt:
|
07/13/2004
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Application #:
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10443775
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Filing Dt:
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05/23/2003
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Publication #:
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Pub Dt:
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11/27/2003
| | | | |
Title:
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SEMICONDUCTOR MEMORY DEVICE HAVING A CIRCUIT FOR FAST OPERATION
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|
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Patent #:
|
NONE
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Issue Dt:
|
|
Application #:
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10460173
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Filing Dt:
|
06/13/2003
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Publication #:
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|
Pub Dt:
|
12/18/2003
| | | | |
Title:
|
Method for depositing sputtered film
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Patent #:
|
|
Issue Dt:
|
09/07/2004
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Application #:
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10600650
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Filing Dt:
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06/23/2003
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Publication #:
|
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Pub Dt:
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04/08/2004
| | | | |
Title:
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SEMICONDUCTOR DEVICE USING AN SOI SUBSTRATE
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|
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Patent #:
|
|
Issue Dt:
|
09/13/2005
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Application #:
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10603738
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Filing Dt:
|
06/26/2003
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Publication #:
|
|
Pub Dt:
|
01/08/2004
| | | | |
Title:
|
SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD THEREOF, AND REGISTRATION ACCURACY MEASUREMENT ENHANCEMENT METHOD
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|
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Patent #:
|
|
Issue Dt:
|
03/15/2005
|
Application #:
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10607259
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Filing Dt:
|
06/27/2003
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Publication #:
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Pub Dt:
|
02/12/2004
| | | | |
Title:
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SEMICONDUCTOR DEVICE WITH REDUCED CURRENT CONSUMPTION IN STANDBY STATE
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|
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Patent #:
|
|
Issue Dt:
|
12/13/2005
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Application #:
|
10615379
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Filing Dt:
|
07/09/2003
|
Publication #:
|
|
Pub Dt:
|
03/11/2004
| | | | |
Title:
|
THIN FILM MAGNETIC MEMORY DEVICE HAVING A HIGHLY INTEGRATED MEMORY ARRAY
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|
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Patent #:
|
|
Issue Dt:
|
02/28/2006
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Application #:
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10622473
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Filing Dt:
|
07/21/2003
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Publication #:
|
|
Pub Dt:
|
06/03/2004
| | | | |
Title:
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THIN FILM MAGNETIC MEMORY DEVICE WITH MEMORY CELLS INCLUDING A TUNNEL MAGNETIC RESISTIVE ELEMENT
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|
|
Patent #:
|
|
Issue Dt:
|
08/14/2007
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Application #:
|
10628384
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Filing Dt:
|
07/29/2003
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Publication #:
|
|
Pub Dt:
|
09/01/2005
| | | | |
Title:
|
SEMICONDUCTOR CIRCUIT DEVICE HAVING HIERARCHICAL POWER SUPPLY STRUCTURE
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|
|
Patent #:
|
NONE
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Issue Dt:
|
|
Application #:
|
10632831
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Filing Dt:
|
08/04/2003
|
Publication #:
|
|
Pub Dt:
|
02/12/2004
| | | | |
Title:
|
Semiconductor integrated circuit device
|
|
|
Patent #:
|
|
Issue Dt:
|
05/10/2005
|
Application #:
|
10633576
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Filing Dt:
|
08/05/2003
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Publication #:
|
|
Pub Dt:
|
02/05/2004
| | | | |
Title:
|
method of manufacturing a semiconductor device with capacitor electrodes
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|
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Patent #:
|
|
Issue Dt:
|
02/07/2006
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Application #:
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10639582
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Filing Dt:
|
08/13/2003
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Publication #:
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|
Pub Dt:
|
03/11/2004
| | | | |
Title:
|
TRACE CONTROL CIRCUIT ADAPTED FOR HIGH-SPEED MICROCOMPUTER OPERATION
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|
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Patent #:
|
|
Issue Dt:
|
11/08/2005
|
Application #:
|
10640322
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Filing Dt:
|
08/14/2003
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Title:
|
SEMICONDUCTOR DEVICE CAPABLE OF SHORTENING TEST TIME AND SUPPRESSING INCREASE IN CHIP AREA, AND METHOD OF MANUFACTURING SEMICONDUCTOR INTEGRATED CIRCUIT DEVICE
|
|
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Patent #:
|
|
Issue Dt:
|
11/09/2004
|
Application #:
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10644750
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Filing Dt:
|
08/21/2003
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Publication #:
|
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Pub Dt:
|
02/26/2004
| | | | |
Title:
|
MIS SEMICONDUCTOR DEVICE HAVING IMPROVED GATE INSULATING FILM RELIABILITY
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|
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Patent #:
|
|
Issue Dt:
|
07/05/2005
|
Application #:
|
10657068
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Filing Dt:
|
09/09/2003
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Publication #:
|
|
Pub Dt:
|
03/11/2004
| | | | |
Title:
|
SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING THE SAME
|
|
|
Patent #:
|
|
Issue Dt:
|
01/24/2006
|
Application #:
|
10663674
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Filing Dt:
|
09/17/2003
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Publication #:
|
|
Pub Dt:
|
04/01/2004
| | | | |
Title:
|
THIN FILM MAGNETIC MEMORY DEVICE HAVING DATA READ CURRENT TUNING FUNCTION
|
|
|
Patent #:
|
|
Issue Dt:
|
06/28/2005
|
Application #:
|
10680397
|
Filing Dt:
|
10/08/2003
|
Publication #:
|
|
Pub Dt:
|
04/15/2004
| | | | |
Title:
|
SEMICONDUCTOR INTEGRATED CIRCUIT DEVICE OPERATING WITH LOW POWER CONSUMPTION
|
|