Patent Assignment Details
NOTE:Results display only for issued patents and published applications.
For pending or abandoned applications please consult USPTO staff.
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| Reel/Frame: | 037235/0888 | |
| Pages: | 4 |
| | Recorded: | 12/08/2015 | | |
| Attorney Dkt #: | 140649-1080 |
| Conveyance: | ASSIGNMENT OF ASSIGNORS INTEREST (SEE DOCUMENT FOR DETAILS). |
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Total properties:
1
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Patent #:
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NONE
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Issue Dt:
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Application #:
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14962193
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Filing Dt:
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12/08/2015
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Publication #:
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Pub Dt:
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12/01/2016
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Title:
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PROCESS FOR PRODUCING MOS TRANSISTORS HAVING A LARGER CHANNEL WIDTH FROM AN SOI AND IN PARTICULAR FDSOI SUBSTRATE, AND CORRESPONDING INTEGRATED CIRCUIT
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Assignee
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| 850, RUE JEAN MONNET |
| CROLLES, FRANCE F-38926 |
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Correspondence name and address
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GWS-ST-EP GARDERE WYNNE SEWELL LLP
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INTELLECTUAL PROPERTY SECTION
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1601 ELM STREET, SUITE 3000
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DALLAS, TX 75201
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