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Total properties:
20
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Patent #:
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Issue Dt:
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02/06/1996
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Application #:
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08387155
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Filing Dt:
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02/10/1995
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Title:
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SEMICONDUCTOR DEVICE HAVING AN UNIVERSAL DIE SIZE INNER LEAD LAYOUT
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Patent #:
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Issue Dt:
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10/08/1996
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Application #:
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08443064
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Filing Dt:
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05/17/1995
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Title:
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APPARATUS FOR MOUNTING INTEGRATED CIRCUIT CHIPS ON A MINI-BOARD
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Patent #:
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Issue Dt:
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07/21/1998
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Application #:
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08554111
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Filing Dt:
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11/06/1995
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Title:
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ARRANGEMENT OF PADS AND THROUGH-HOLES FOR SEMICONDUCTOR PACKAGES
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Patent #:
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Issue Dt:
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01/12/1999
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Application #:
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08839052
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Filing Dt:
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04/23/1997
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Title:
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REFLOW BALL GRID ARRAY ASSEMBLY
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Patent #:
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Issue Dt:
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10/26/1999
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Application #:
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08932711
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Filing Dt:
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09/17/1997
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Title:
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INTERPOSER FOR BALL GRID ARRAY (BGA) PACKAGE
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Patent #:
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Issue Dt:
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12/28/1999
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Application #:
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09006813
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Filing Dt:
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01/14/1998
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Title:
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INTEGRATED CIRCUIT PACKAGE HAVING SIGNAL TRACES INTERPOSED BETWEEN POWER AND GROUND CONDUCTORS IN ORDER TO FORM STRIPLINE TRANSMISSION LINES
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Patent #:
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Issue Dt:
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10/03/2000
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Application #:
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09344178
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Filing Dt:
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06/24/1999
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Title:
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SINGLE REFERENCE PlANE PLASTIC BALL GRID ARRAY PACKAGE
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Patent #:
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Issue Dt:
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05/28/2002
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Application #:
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09632358
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Filing Dt:
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08/03/2000
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Title:
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SINGLE REFERENCE PLANE PLASTIC BALL GRID ARRAY PACKAGE
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Patent #:
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Issue Dt:
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06/18/2002
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Application #:
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09735980
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Filing Dt:
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12/13/2000
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Title:
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METHOD FOR INCREASING TRACE ROWS OF A BALL GRID ARRAY
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Patent #:
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Issue Dt:
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09/17/2002
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Application #:
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09781866
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Filing Dt:
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02/12/2001
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Title:
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LAYOUT OF VDD AND VSS BALLS IN A FOUR LAYER PBGA
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Patent #:
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Issue Dt:
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07/13/2004
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Application #:
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09844530
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Filing Dt:
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04/27/2001
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Title:
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BALL ASSIGNMENT FOR BALL GRID ARRAY PACKAGE
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Patent #:
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Issue Dt:
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11/26/2002
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Application #:
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09894718
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Filing Dt:
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06/27/2001
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Title:
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TAPE DESIGN TO REDUCE WARPAGE
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Patent #:
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Issue Dt:
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05/20/2003
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Application #:
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09919284
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Filing Dt:
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07/31/2001
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Title:
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PBGA ELECTRICAL NOISE ISOLATION OF SIGNAL TRACES
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Patent #:
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Issue Dt:
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08/19/2003
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Application #:
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10105863
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Filing Dt:
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03/25/2002
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Title:
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INTEGRATED CIRCUIT PACKAGE SUBSTRATE WITH HIGH DENSITY ROUTING MECHANISM
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Patent #:
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Issue Dt:
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05/10/2005
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Application #:
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10164495
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Filing Dt:
|
06/06/2002
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Title:
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INTEGRATED CIRCUIT PACKAGE SUBSTRATE WITH HIGH DENSITY ROUTING MECHANISM
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Patent #:
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Issue Dt:
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11/30/2004
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Application #:
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10387261
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Filing Dt:
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03/11/2003
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Publication #:
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Pub Dt:
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12/18/2003
| | | | |
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Title:
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PBGA ELECTRICAL NOISE ISOLATION OF SIGNAL TRACES
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|
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Patent #:
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Issue Dt:
|
09/14/2004
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Application #:
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10435805
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Filing Dt:
|
05/12/2003
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Title:
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INTEGRATED CIRCUIT PACKAGING THAT USES GUARD CONDUCTORS TO ISOLATE NOISE-SENSITIVE SIGNALS WITHIN THE PACKAGE SUBSTRATE
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Patent #:
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Issue Dt:
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05/30/2006
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Application #:
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10452874
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Filing Dt:
|
06/02/2003
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Publication #:
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Pub Dt:
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10/02/2003
| | | | |
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Title:
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DESIGNING A BALL ASSIGNMENT FOR A BALL GRID ARRAY PACKAGE
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Patent #:
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Issue Dt:
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05/24/2005
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Application #:
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10626366
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Filing Dt:
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07/23/2003
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Title:
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INTEGRATED CIRCUIT PACKAGE AND METHOD FOR A PBGA PACKAGE HAVING A MULTIPLICITY OF STAGGERED POWER RING SEGMENTS FOR POWER CONNECTION TO INTEGRATED CIRCUIT DIE
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Patent #:
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Issue Dt:
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02/05/2008
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Application #:
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11205364
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Filing Dt:
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08/17/2005
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Publication #:
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Pub Dt:
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02/22/2007
| | | | |
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Title:
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TWO LAYER SUBSTRATE BALL GRID ARRAY DESIGN
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