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Reel/Frame:	025105/0907			Pages:	57
		Recorded:	10/08/2010
Attorney Dkt #:	22524-00230
Conveyance:	ASSIGNMENT OF ASSIGNORS INTEREST (SEE DOCUMENT FOR DETAILS).

Total properties: 264
Page 2 of 3
Pages: 1 2 3

1

Patent #:	6977527	Issue Dt:	12/20/2005	Application #:	10455261	Filing Dt:	06/04/2003
Title:	METHOD AND APPARATUS FOR SUPPRESSING SPURIOUS VALUES IN A DIFFERENTIAL OUTPUT CURRENT

2

Patent #:	8676361	Issue Dt:	03/18/2014	Application #:	10516907	Filing Dt:	08/09/2005
Publication #:	US20060098827	Pub Dt:	05/11/2006
Title:	ACOUSTICAL VIRTUAL REALITY ENGINE AND ADVANCED TECHNIQUES FOR ENHANCING DELIVERED SOUND

3

Patent #:	6954159	Issue Dt:	10/11/2005	Application #:	10612829	Filing Dt:	07/01/2003
Title:	LOW DISTORTION BAND-PASS ANALOG TO DIGITAL CONVERTER WITH FEED FORWARD

4

Patent #:	6842327	Issue Dt:	01/11/2005	Application #:	10635247	Filing Dt:	08/05/2003
Title:	HIGH-VOLTAGE CMOS-COMPATIBLE CAPACITORS

5

Patent #:	6873281	Issue Dt:	03/29/2005	Application #:	10652537	Filing Dt:	08/28/2003
Title:	INTERLEAVED DIGITAL CORRECTION FOR MASH DELTA-SIGMA ADC

6

Patent #:	8102007	Issue Dt:	01/24/2012	Application #:	10661037	Filing Dt:	09/12/2003
Title:	APPARATUS FOR TRIMMING HIGH-RESOLUTION DIGITAL-TO-ANALOG CONVERTER

7

Patent #:	7290186	Issue Dt:	10/30/2007	Application #:	10664190	Filing Dt:	09/16/2003
Title:	VARIOUS METHODS AND APPARATUSES FOR A COMMAND BASED BIST FOR MEMORIES

8

Patent #:	7805724	Issue Dt:	09/28/2010	Application #:	10665875	Filing Dt:	09/19/2003
Title:	APPARATUS, METHOD AND COMPUTER PROGRAM FOR DYNAMIC SLIP CONTROL IN REAL-TIME SCHEDULING

9

Patent #:	7451447	Issue Dt:	11/11/2008	Application #:	10669542	Filing Dt:	09/23/2003
Title:	METHOD, COMPUTER PROGRAM AND APPARATUS FOR OPERATING SYSTEM DYNAMIC EVENT MANAGEMENT AND TASK SCHEDULING USING FUNCTION CALLS

10

Patent #:	7049872	Issue Dt:	05/23/2006	Application #:	10681577	Filing Dt:	10/07/2003
Publication #:	US20040124892	Pub Dt:	07/01/2004
Title:	USE OF ANALOG-VALUED FLOATING-GATE TRANSISTORS TO MATCH THE ELECTRICAL CHARACTERISTICS OF INTERLEAVED AND PIPELINED CIRCUITS

11

Patent #:	7415640	Issue Dt:	08/19/2008	Application #:	10684793	Filing Dt:	10/13/2003
Title:	METHODS AND APPARATUSES THAT REDUCE THE SIZE OF A REPAIR DATA CONTAINER FOR REPAIRABLE MEMORIES

12

Patent #:	7031866	Issue Dt:	04/18/2006	Application #:	10701545	Filing Dt:	11/05/2003
Title:	SYSTEM AND METHOD FOR TESTING A MEMORY

13

Patent #:	7415641	Issue Dt:	08/19/2008	Application #:	10702014	Filing Dt:	11/05/2003
Title:	SYSTEM AND METHOD FOR REPAIRING A MEMORY

14

Patent #:	7219324	Issue Dt:	05/15/2007	Application #:	10779194	Filing Dt:	02/13/2004
Title:	VARIOUS METHOD AND APPARATUSES TO ROUTE MULTIPLE POWER RAILS TO A CELL

15

Patent #:	7061794	Issue Dt:	06/13/2006	Application #:	10813419	Filing Dt:	03/30/2004
Title:	WORDLINE-BASED SOURCE-BIASING SCHEME FOR REDUCING MEMORY CELL LEAKAGE

16

Patent #:	7242614	Issue Dt:	07/10/2007	Application #:	10813907	Filing Dt:	03/30/2004
Publication #:	US20050219931	Pub Dt:	10/06/2005
Title:	REWRITEABLE ELECTRONIC FUSES

17

Patent #:	7388420	Issue Dt:	06/17/2008	Application #:	10814866	Filing Dt:	03/30/2004
Publication #:	US20050219932	Pub Dt:	10/06/2005
Title:	REWRITEABLE ELECTRONIC FUSES

18

Patent #:	7145370	Issue Dt:	12/05/2006	Application #:	10814867	Filing Dt:	03/30/2004
Publication #:	US20050052201	Pub Dt:	03/10/2005
Title:	HIGH-VOLTAGE SWITCHES IN SINGLE-WELL CMOS PROCESSES

19

Patent #:	7177182	Issue Dt:	02/13/2007	Application #:	10814868	Filing Dt:	03/30/2004
Publication #:	US20050237840	Pub Dt:	10/27/2005
Title:	REWRITEABLE ELECTRONIC FUSES

20

Patent #:	7035129	Issue Dt:	04/25/2006	Application #:	10816763	Filing Dt:	04/02/2004
Title:	PARTITIONED SOURCE LINE ARCHITECTURE FOR ROM

21

Patent #:	7185260	Issue Dt:	02/27/2007	Application #:	10818735	Filing Dt:	04/05/2004
Publication #:	US20040225949	Pub Dt:	11/11/2004
Title:	METHOD AND APPARATUS FOR IMPLEMENTING A DATA PROCESSOR ADAPTED FOR TURBO DECODING

22

Patent #:	7212446	Issue Dt:	05/01/2007	Application #:	10830280	Filing Dt:	04/21/2004
Publication #:	US20040195593	Pub Dt:	10/07/2004
Title:	COUNTERACTING OVERTUNNELING IN NONVOLATILE MEMORY CELLS USING CHARGE EXTRACTION CONTROL

23

Patent #:	7221596	Issue Dt:	05/22/2007	Application #:	10839985	Filing Dt:	05/05/2004
Publication #:	US20050063235	Pub Dt:	03/24/2005
Title:	PFET NONVOLATILE MEMORY

24

Patent #:	7149142	Issue Dt:	12/12/2006	Application #:	10856191	Filing Dt:	05/28/2004
Title:	METHODS AND APPARATUSES FOR MEMORY ARRAY LEAKAGE REDUCTION USING INTERNAL VOLTAGE BIASING CIRCUITRY

25

Patent #:	7069522	Issue Dt:	06/27/2006	Application #:	10856520	Filing Dt:	05/28/2004
Title:	VARIOUS METHODS AND APPARATUSES TO PRESERVE A LOGIC STATE FOR A VOLATILE LATCH CIRCUIT

26

Patent #:	7315067	Issue Dt:	01/01/2008	Application #:	10884236	Filing Dt:	07/02/2004
Publication #:	US20060001087	Pub Dt:	01/05/2006
Title:	NATIVE HIGH-VOLTAGE N-CHANNEL LDMOSFET IN STANDARD LOGIC CMOS

27

Patent #:	7145203	Issue Dt:	12/05/2006	Application #:	10884326	Filing Dt:	07/02/2004
Publication #:	US20050236666	Pub Dt:	10/27/2005
Title:	GRADED-JUNCTION HIGH-VOLTAGE MOSFET IN STANDARD LOGIC CMOS

28

Patent #:	7095076	Issue Dt:	08/22/2006	Application #:	10897185	Filing Dt:	07/21/2004
Title:	ELECTRICALLY-ALTERABLE NON-VOLATILE MEMORY CELL

29

Patent #:	7098498	Issue Dt:	08/29/2006	Application #:	10914968	Filing Dt:	08/09/2004
Publication #:	US20050099859	Pub Dt:	05/12/2005
Title:	FLOATING-GATE SEMICONDUCTOR STRUCTURES

30

Patent #:	7548460	Issue Dt:	06/16/2009	Application #:	10915107	Filing Dt:	08/09/2004
Publication #:	US20050104118	Pub Dt:	05/19/2005
Title:	FLOATING-GATE SEMICONDUCTOR STRUCTURES

31

Patent #:	7042701	Issue Dt:	05/09/2006	Application #:	10931582	Filing Dt:	09/01/2004
Publication #:	US20050030702	Pub Dt:	02/10/2005
Title:	HIGH-VOLTAGE CMOS-COMPATIBLE CAPACITORS

32

Patent #:	7071507	Issue Dt:	07/04/2006	Application #:	10931583	Filing Dt:	09/01/2004
Publication #:	US20050093094	Pub Dt:	05/05/2005
Title:	HIGH-VOLTAGE CMOS-COMPATIBLE CAPACITORS

33

Patent #:	7149118	Issue Dt:	12/12/2006	Application #:	10936282	Filing Dt:	09/07/2004
Publication #:	US20050030826	Pub Dt:	02/10/2005
Title:	METHOD AND APPARATUS FOR PROGRAMMING SINGLE-POLY PFET-BASED NONVOLATILE MEMORY CELLS

34

Patent #:	7219315	Issue Dt:	05/15/2007	Application #:	10937726	Filing Dt:	09/09/2004
Title:	COMPARISON OF SEMICONDUCTOR CIRCUITRY SIMULATIONS

35

Patent #:	8264039	Issue Dt:	09/11/2012	Application #:	10952708	Filing Dt:	09/28/2004
Publication #:	US20050258461	Pub Dt:	11/24/2005
Title:	HIGH-VOLTAGE LDMOSFET AND APPLICATIONS THEREFOR IN STANDARD CMOS

36

Patent #:	7129562	Issue Dt:	10/31/2006	Application #:	10956689	Filing Dt:	10/01/2004
Title:	DUAL-HEIGHT CELL WITH VARIABLE WIDTH POWER RAIL ARCHITECTURE

37

Patent #:	7184346	Issue Dt:	02/27/2007	Application #:	11029916	Filing Dt:	01/04/2005
Title:	MEMORY CELL SENSING WITH LOW NOISE GENERATION

38

Patent #:	7038603	Issue Dt:	05/02/2006	Application #:	11055947	Filing Dt:	02/10/2005
Publication #:	US20050162233	Pub Dt:	07/28/2005
Title:	ANALOG TO DIGITAL CONVERTER USING ANALOG-VALUED FLOATING-GATE TRANSISTORS

39

Patent #:	7038544	Issue Dt:	05/02/2006	Application #:	11055948	Filing Dt:	02/10/2005
Publication #:	US20050200415	Pub Dt:	09/15/2005
Title:	USE OF ANALOG-VALUED FLOATING-GATE TRANSISTORS FOR PARALLEL AND SERIAL SIGNAL PROCESSING

40

Patent #:	7389101	Issue Dt:	06/17/2008	Application #:	11055958	Filing Dt:	02/10/2005
Publication #:	US20050140449	Pub Dt:	06/30/2005
Title:	USE OF ANALOG-VALUED FLOATING-GATE TRANSISTORS FOR PARALLEL AND SERIAL SIGNAL PROCESSING

41

Patent #:	7061324	Issue Dt:	06/13/2006	Application #:	11055959	Filing Dt:	02/10/2005
Publication #:	US20050200417	Pub Dt:	09/15/2005
Title:	USE OF ANALOG-VALUED FLOATING-GATE TRANSISTORS FOR PARALLEL AND SERIAL SIGNAL PROCESSING

42

Patent #:	7142452	Issue Dt:	11/28/2006	Application #:	11077654	Filing Dt:	03/10/2005
Title:	METHOD AND SYSTEM FOR SECURING DATA IN A MULTI-TIME PROGRAMMABLE NON-VOLATILE MEMORY DEVICE

43

Patent #:	7263001	Issue Dt:	08/28/2007	Application #:	11084213	Filing Dt:	03/17/2005
Publication #:	US20060209597	Pub Dt:	09/21/2006
Title:	COMPACT NON-VOLATILE MEMORY CELL AND ARRAY SYSTEM

44

Patent #:	7257033	Issue Dt:	08/14/2007	Application #:	11084214	Filing Dt:	03/17/2005
Publication #:	US20060209598	Pub Dt:	09/21/2006
Title:	INVERTER NON-VOLATILE MEMORY CELL AND ARRAY SYSTEM

45

Patent #:	7679957	Issue Dt:	03/16/2010	Application #:	11106982	Filing Dt:	04/15/2005
Publication #:	US20060221715	Pub Dt:	10/05/2006
Title:	REDUNDANT NON-VOLATILE MEMORY CELL

46

Patent #:	8719837	Issue Dt:	05/06/2014	Application #:	11132424	Filing Dt:	05/19/2005
Publication #:	US20050289321	Pub Dt:	12/29/2005
Title:	Microprocessor architecture having extendible logic

47

Patent #:	7375398	Issue Dt:	05/20/2008	Application #:	11138888	Filing Dt:	05/26/2005
Publication #:	US20060001050	Pub Dt:	01/05/2006
Title:	HIGH VOLTAGE FET GATE STRUCTURE

48

Patent #:	7139204	Issue Dt:	11/21/2006	Application #:	11146829	Filing Dt:	06/06/2005
Title:	METHOD AND SYSTEM FOR TESTING A DUAL-PORT MEMORY AT SPEED IN A STRESSED ENVIRONMENT

49

Patent #:	7263016	Issue Dt:	08/28/2007	Application #:	11147790	Filing Dt:	06/07/2005
Title:	METHOD AND SYSTEM FOR PRE-CHARGING AND BIASING A LATCH-TYPE SENSE AMPLIFIER

50

Patent #:	7298659	Issue Dt:	11/20/2007	Application #:	11147791	Filing Dt:	06/07/2005
Title:	METHOD AND SYSTEM FOR ACCELERATED DETECTION OF WEAK BITS IN AN SRAM MEMORY DEVICE

51

Patent #:	7251186	Issue Dt:	07/31/2007	Application #:	11147928	Filing Dt:	06/07/2005
Title:	MULTI-PORT MEMORY UTILIZING AN ARRAY OF SINGLE-PORT MEMORY CELLS

52

Patent #:	8076707	Issue Dt:	12/13/2011	Application #:	11224743	Filing Dt:	09/12/2005
Title:	PSEUDO-NONVOLATILE DIRECT-TUNNELING FLOATING-GATE DEVICE

53

Patent #:	7283390	Issue Dt:	10/16/2007	Application #:	11237099	Filing Dt:	09/28/2005
Publication #:	US20060023550	Pub Dt:	02/02/2006
Title:	HYBRID NON-VOLATILE MEMORY

54

Patent #:	7102438	Issue Dt:	09/05/2006	Application #:	11257897	Filing Dt:	10/24/2005
Title:	AUTOZEROING FLOATING-GATE AMPLIFIER

55

Patent #:	7233274	Issue Dt:	06/19/2007	Application #:	11313549	Filing Dt:	12/20/2005
Publication #:	US20070139244	Pub Dt:	06/21/2007
Title:	CAPACITIVE LEVEL SHIFTING FOR ANALOG SIGNAL PROCESSING

56

Patent #:	7262092	Issue Dt:	08/28/2007	Application #:	11326243	Filing Dt:	01/04/2006
Publication #:	US20060120013	Pub Dt:	06/08/2006
Title:	HIGH-VOLTAGE CMOS-COMPATIBLE CAPACITORS

57

Patent #:	7478350	Issue Dt:	01/13/2009	Application #:	11328926	Filing Dt:	01/09/2006
Publication #:	US20070033551	Pub Dt:	02/08/2007
Title:	MODEL MODIFICATION METHOD FOR TIMING INTEROPERABILITY FOR SIMULATING HARDWARE

58

Patent #:	7289358	Issue Dt:	10/30/2007	Application #:	11335185	Filing Dt:	01/18/2006
Publication #:	US20060181927	Pub Dt:	08/17/2006
Title:	MTP NVM ELEMENTS BY-PASSED FOR PROGRAMMING

59

Patent #:	7616036	Issue Dt:	11/10/2009	Application #:	11340147	Filing Dt:	01/25/2006
Title:	PROGRAMMABLE STROBE AND CLOCK GENERATOR

60

Patent #:	7715236	Issue Dt:	05/11/2010	Application #:	11372438	Filing Dt:	03/09/2006
Publication #:	US20060220639	Pub Dt:	10/05/2006
Title:	FAULT TOLERANT NON VOLATILE MEMORIES AND METHODS

61

Patent #:	7376013	Issue Dt:	05/20/2008	Application #:	11385269	Filing Dt:	03/21/2006
Publication #:	US20070070698	Pub Dt:	03/29/2007
Title:	COMPACT VIRTUAL GROUND DIFFUSION PROGRAMMABLE ROM ARRAY ARCHITECTURE, SYSTEM AND METHOD

62

Patent #:	8759937	Issue Dt:	06/24/2014	Application #:	11387515	Filing Dt:	03/22/2006
Publication #:	US20060223246	Pub Dt:	10/05/2006
Title:	SCHOTTKY JUNCTION DIODE DEVICES IN CMOS WITH MULTIPLE WELLS

63

Patent #:	7732887	Issue Dt:	06/08/2010	Application #:	11387603	Filing Dt:	03/22/2006
Publication #:	US20060223247	Pub Dt:	10/05/2006
Title:	SCHOTTKY JUNCTION DIODE DEVICES IN CMOS

64

Patent #:	7603634	Issue Dt:	10/13/2009	Application #:	11401806	Filing Dt:	04/10/2006
Publication #:	US20060198228	Pub Dt:	09/07/2006
Title:	VARIOUS METHODS AND APPARATUSES TO PRESERVE A LOGIC STATE FOR A VOLATILE LATCH CIRCUIT

65

Patent #:	7539590	Issue Dt:	05/26/2009	Application #:	11403783	Filing Dt:	04/13/2006
Publication #:	US20060190208	Pub Dt:	08/24/2006
Title:	SYSTEM AND METHOD FOR TESTING A MEMORY

66

Patent #:	7199663	Issue Dt:	04/03/2007	Application #:	11409311	Filing Dt:	04/21/2006
Publication #:	US20060186960	Pub Dt:	08/24/2006
Title:	USE OF ANALOG-VALUED FLOATING-GATE TRANSISTORS FOR PARALLEL AND SERIAL SIGNAL PROCESSING

67

Patent #:	7301819	Issue Dt:	11/27/2007	Application #:	11409610	Filing Dt:	04/24/2006
Publication #:	US20060187697	Pub Dt:	08/24/2006
Title:	ROM WITH A PARTITIONED SOURCE LINE ARCHITECTURE

68

Patent #:	7398458	Issue Dt:	07/08/2008	Application #:	11430478	Filing Dt:	05/08/2006
Publication #:	US20060236214	Pub Dt:	10/19/2006
Title:	METHOD AND APPARATUS FOR IMPLEMENTING DECODE OPERATIONS IN A DATA PROCESSOR

69

Patent #:	7774768	Issue Dt:	08/10/2010	Application #:	11438930	Filing Dt:	05/22/2006
Publication #:	US20060212863	Pub Dt:	09/21/2006
Title:	METHOD AND APPARATUS FOR PROCESSOR CODE OPTIMIZATION USING CODE COMPRESSION

70

Patent #:	7692964	Issue Dt:	04/06/2010	Application #:	11451043	Filing Dt:	06/12/2006
Title:	SOURCE-BIASED SRAM CELL WITH REDUCED MEMORY CELL LEAKAGE

71

Patent #:	8159001	Issue Dt:	04/17/2012	Application #:	11490407	Filing Dt:	07/19/2006
Publication #:	US20070093028	Pub Dt:	04/26/2007
Title:	GRADED JUNCTION HIGH VOLTAGE SEMICONDUCTOR DEVICE

72

Patent #:	7519888	Issue Dt:	04/14/2009	Application #:	11499829	Filing Dt:	08/04/2006
Publication #:	US20070079200	Pub Dt:	04/05/2007
Title:	INPUT-OUTPUT DEVICE TESTING

73

Patent #:	7406620	Issue Dt:	07/29/2008	Application #:	11503641	Filing Dt:	08/14/2006
Publication #:	US20060277430	Pub Dt:	12/07/2006
Title:	SYSTEM AND METHOD FOR COMPILING A MEMORY ASSEMBLY WITH REDUNDANCY IMPLEMENTATION

74

Patent #:	7598726	Issue Dt:	10/06/2009	Application #:	11510035	Filing Dt:	08/24/2006
Title:	METHODS AND APPARATUSES FOR TEST METHODOLOGY OF INPUT-OUTPUT CIRCUITS

75

Patent #:	7580311	Issue Dt:	08/25/2009	Application #:	11513597	Filing Dt:	08/30/2006
Publication #:	US20060291319	Pub Dt:	12/28/2006
Title:	REDUCED AREA HIGH VOLTAGE SWITCH FOR NVM

76

Patent #:	7653849	Issue Dt:	01/26/2010	Application #:	11520200	Filing Dt:	09/12/2006
Title:	INPUT-OUTPUT DEVICE TESTING INCLUDING EMBEDDED TESTS

77

Patent #:	8032805	Issue Dt:	10/04/2011	Application #:	11520276	Filing Dt:	09/12/2006
Title:	INPUT-OUTPUT DEVICE TESTING INCLUDING VOLTAGE TESTS

78

Patent #:	7853847	Issue Dt:	12/14/2010	Application #:	11520282	Filing Dt:	09/12/2006
Title:	METHODS AND APPARATUSES FOR EXTERNAL VOLTAGE TEST OF INPUT-OUTPUT CIRCUITS

79

Patent #:	8032806	Issue Dt:	10/04/2011	Application #:	11520344	Filing Dt:	09/12/2006
Title:	INPUT-OUTPUT DEVICE TESTING INCLUDING INITIALIZING AND LEAKAGE TESTING INPUT-OUTPUT DEVICES

80

Patent #:	7590902	Issue Dt:	09/15/2009	Application #:	11520423	Filing Dt:	09/12/2006
Title:	METHODS AND APPARATUSES FOR EXTERNAL DELAY TEST OF INPUT-OUTPUT CIRCUITS

81

Patent #:	7779319	Issue Dt:	08/17/2010	Application #:	11520480	Filing Dt:	09/12/2006
Title:	INPUT-OUTPUT DEVICE TESTING INCLUDING DELAY TESTS

82

Patent #:	7856581	Issue Dt:	12/21/2010	Application #:	11520530	Filing Dt:	09/12/2006
Title:	METHODS AND APPARATUSES FOR EXTERNAL TEST METHODOLOGY AND INITIALIZATION OF INPUT-OUTPUT CIRCUITS

83

Patent #:	7458005	Issue Dt:	11/25/2008	Application #:	11524691	Filing Dt:	09/21/2006
Title:	SYSTEM AND METHOD FOR PROVIDING ADJUSTABLE READ MARGINS IN A SEMICONDUCTOR MEMORY

84

Patent #:	7408809	Issue Dt:	08/05/2008	Application #:	11528069	Filing Dt:	09/26/2006
Publication #:	US20070019475	Pub Dt:	01/25/2007
Title:	METHOD AND APPARATUS FOR PROGRAMMING SINGLE-POLY PFET-BASED NONVOLATILE MEMORY CELLS

85

Patent #:	7411828	Issue Dt:	08/12/2008	Application #:	11528150	Filing Dt:	09/26/2006
Publication #:	US20070019476	Pub Dt:	01/25/2007
Title:	METHOD AND APPARATUS FOR PROGRAMMING SINGLE-POLY PFET-BASED NONVOLATILE MEMORY CELLS

86

Patent #:	7411829	Issue Dt:	08/12/2008	Application #:	11528262	Filing Dt:	09/26/2006
Publication #:	US20070019477	Pub Dt:	01/25/2007
Title:	METHOD AND APPARATUS FOR PROGRAMMING SINGLE-POLY PFET-BASED NONVOLATILE MEMORY CELLS

87

Patent #:	8212823	Issue Dt:	07/03/2012	Application #:	11528325	Filing Dt:	09/28/2006
Publication #:	US20070070080	Pub Dt:	03/29/2007
Title:	SYSTEMS AND METHODS FOR ACCELERATING SUB-PIXEL INTERPOLATION IN VIDEO PROCESSING APPLICATIONS

88

Patent #:	7747088	Issue Dt:	06/29/2010	Application #:	11528327	Filing Dt:	09/28/2006
Publication #:	US20070071106	Pub Dt:	03/29/2007
Title:	SYSTEMS AND METHODS FOR PERFORMING DEBLOCKING IN MICROPROCESSOR-BASED VIDEO CODEC APPLICATIONS

89

Patent #:	7971042	Issue Dt:	06/28/2011	Application #:	11528338	Filing Dt:	09/28/2006
Publication #:	US20070074012	Pub Dt:	03/29/2007
Title:	MICROPROCESSOR SYSTEM AND METHOD FOR INSTRUCTION-INITIATED RECORDING AND EXECUTION OF INSTRUCTION SEQUENCES IN A DYNAMICALLY DECOUPLEABLE EXTENDED INSTRUCTION PIPELINE

90

Patent #:	8218635	Issue Dt:	07/10/2012	Application #:	11528432	Filing Dt:	09/28/2006
Publication #:	US20070071101	Pub Dt:	03/29/2007
Title:	SYSTOLIC-ARRAY BASED SYSTEMS AND METHODS FOR PERFORMING BLOCK MATCHING IN MOTION COMPENSATION

91

Patent #:	7355914	Issue Dt:	04/08/2008	Application #:	11590695	Filing Dt:	10/30/2006
Publication #:	US20070041236	Pub Dt:	02/22/2007
Title:	METHODS AND APPARATUSES FOR A SENSE AMPLIFIER

92

Patent #:	7747425	Issue Dt:	06/29/2010	Application #:	11593729	Filing Dt:	11/07/2006
Title:	SYSTEM AND METHOD FOR PEAK CURRENT MODELING FOR AN IC DESIGN

93

Patent #:	7508719	Issue Dt:	03/24/2009	Application #:	11601305	Filing Dt:	11/16/2006
Publication #:	US20080049519	Pub Dt:	02/28/2008
Title:	NON-VOLATILE MEMORY CELL CIRCUIT WITH PROGRAMMING THROUGH BAND-TO-BAND TUNNELING AND IMPACT IONIZATION GATE CURRENT

94

Patent #:	7474568	Issue Dt:	01/06/2009	Application #:	11601474	Filing Dt:	11/16/2006
Publication #:	US20080056010	Pub Dt:	03/06/2008
Title:	NON-VOLATILE MEMORY WITH PROGRAMMING THROUGH BAND-TO-BAND TUNNELING AND IMPACT IONIZATION GATE CURRENT

95

Patent #:	8289966	Issue Dt:	10/16/2012	Application #:	11607429	Filing Dt:	12/01/2006
Title:	PACKET INGRESS/EGRESS BLOCK AND SYSTEM AND METHOD FOR RECEIVING, TRANSMITTING, AND MANAGING PACKETIZED DATA

96

Patent #:	8127113	Issue Dt:	02/28/2012	Application #:	11607452	Filing Dt:	12/01/2006
Title:	GENERATING HARDWARE ACCELERATORS AND PROCESSOR OFFLOADS

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Patent #:	8706987	Issue Dt:	04/22/2014	Application #:	11607474	Filing Dt:	12/01/2006
Title:	STRUCTURED BLOCK TRANSFER MODULE, SYSTEM ARCHITECTURE, AND METHOD FOR TRANSFERRING

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Patent #:	7549136	Issue Dt:	06/16/2009	Application #:	11614133	Filing Dt:	12/22/2006
Publication #:	US20070162879	Pub Dt:	07/12/2007
Title:	SYSTEM AND METHOD FOR APPROXIMATING INTRINSIC CAPACITANCE OF AN IC BLOCK

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Patent #:	8392862	Issue Dt:	03/05/2013	Application #:	11657228	Filing Dt:	01/23/2007
Title:	STRUCTURES AND METHODS FOR OPTIMIZING POWER CONSUMPTION IN AN INTEGRATED CHIP DESIGN

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Patent #:	7939861	Issue Dt:	05/10/2011	Application #:	11701710	Filing Dt:	02/02/2007
Publication #:	US20080186772	Pub Dt:	08/07/2008
Title:	NON-VOLATILE MEMORY DEVICES HAVING FLOATING-GATES FETS WITH DIFFERENT SOURCE-GATE AND DRAIN-GATE BORDER LENGTHS

Assignors

1

VIRAGE LOGIC CORPORATION

Exec Dt:

09/02/2010

2

Exec Dt:

09/02/2010

3

ARC CORES LIMITED

Exec Dt:

09/02/2010

4

ARC INTERNATIONAL I.P., INC.

Exec Dt:

09/02/2010

5

ARC INTERNATIONAL INTELLECTUAL PROPERTY, INC.

Exec Dt:

09/02/2010

6

ARC INTERNATIONAL LIMITED, FORMERLY ARC INTERNATIONAL PLC

Exec Dt:

09/02/2010

7

ARC INTERNATIONAL (UK) LIMITED

Exec Dt:

09/02/2010

Assignee

1

700 EAST MIDDLEFIELD ROAD

MOUNTAIN VIEW, CALIFORNIA 94043

Correspondence name and address
	FENWICK & WEST LLP
	801 CALIFORNIA ST
	ATTN MICHAEL W. FARN
	MOUNTAIN VIEW, CA 94041

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