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Patent Assignment Details
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Reel/Frame:045774/0909   Pages: 4
Recorded: 05/10/2018
Attorney Dkt #:KILOP007C1
Conveyance: ASSIGNMENT OF ASSIGNORS INTEREST (SEE DOCUMENT FOR DETAILS).
Total properties: 5
1
Patent #:
Issue Dt:
02/07/2017
Application #:
14841521
Filing Dt:
08/31/2015
Publication #:
Pub Dt:
03/31/2016
Title:
Methods of Reading and Writing Data in a Thyristor Random Access Memory
2
Patent #:
Issue Dt:
12/27/2016
Application #:
14841578
Filing Dt:
08/31/2015
Publication #:
Pub Dt:
03/31/2016
Title:
Methods of Retaining and Refreshing Data in a Thyristor Random Access Memory
3
Patent #:
Issue Dt:
11/15/2016
Application #:
14841615
Filing Dt:
08/31/2015
Publication #:
Pub Dt:
03/31/2016
Title:
Power Reduction in Thyristor Random Access Memory
4
Patent #:
Issue Dt:
10/02/2018
Application #:
15283141
Filing Dt:
09/30/2016
Publication #:
Pub Dt:
01/26/2017
Title:
Methods of Retaining and Refreshing Data in a Thyristor Random Access Memory
5
Patent #:
Issue Dt:
07/10/2018
Application #:
15426909
Filing Dt:
02/07/2017
Publication #:
Pub Dt:
12/28/2017
Title:
Methods of Reading and Writing Data in a Thyristor Random Access Memory
Assignors
1
Exec Dt:
05/01/2018
2
Exec Dt:
05/01/2018
3
Exec Dt:
05/01/2018
4
Exec Dt:
05/01/2018
Assignee
1
2895 ZANKER ROAD
SAN JOSE, CALIFORNIA 95134
Correspondence name and address
AKA CHAN LLP / GARY T. AKA
900 LAFAYETTE STREET
SUITE 710
SANTA CLARA, CA 95050

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