Patent Assignment Details
NOTE:Results display only for issued patents and published applications.
For pending or abandoned applications please consult USPTO staff.
|
Reel/Frame: | 049091/0917 | |
| Pages: | 4 |
| | Recorded: | 05/06/2019 | | |
Attorney Dkt #: | 023083.0013 |
Conveyance: | CORRECTIVE ASSIGNMENT TO CORRECT THE TYPOGRAPHICAL ERROR IN THE ASSIGNEE'S NAME PREVIOUSLY RECORDED ON REEL 038370 FRAME 0232. ASSIGNOR(S) HEREBY CONFIRMS THE ASSIGNMENT. |
|
Total properties:
1
|
|
Patent #:
|
|
Issue Dt:
|
07/23/2019
|
Application #:
|
15137411
|
Filing Dt:
|
04/25/2016
|
Publication #:
|
|
Pub Dt:
|
10/27/2016
| | | | |
Title:
|
CIRCUIT AND METHOD FOR DETECTING TAMPERING OR PREVENTING FORGERY OF SEMICONDUCTOR CHIP
|
|
Assignee
|
|
|
215, DAESIN-RO, HEUNGDEOK-GU, CHUNGCHEONGBUK-DO |
CHEONGJU-SI, KOREA, REPUBLIC OF 28429 |
|
Correspondence name and address
|
|
NSIP LAW
|
|
P.O. BOX 65745
|
|
WASHINGTON, DC 20035
|
Search Results as of:
09/21/2024 07:20 AM
If you have any comments or questions concerning the data displayed,
contact
PRD / Assignments at 571-272-3350. v.2.6
Web interface last modified:
August 25, 2017 v.2.6
|