skip navigationU S P T O SealUnited States Patent and Trademark Office AOTW logo
Home|Site Index|Search|Guides|Contacts|eBusiness|eBiz alerts|News|Help
Assignments on the Web > Patent Query
Patent Assignment Details
NOTE:Results display only for issued patents and published applications. For pending or abandoned applications please consult USPTO staff.

Reel/Frame:054772/0918   Pages: 17
Recorded: 12/16/2020
Conveyance: ASSIGNMENT OF ASSIGNORS INTEREST (SEE DOCUMENT FOR DETAILS).
Total properties: 64
1
Patent #:
7296137
Issue Dt:
11/13/2007
Application #:
11140176
Filing Dt:
05/27/2005
Publication #:
US20060271759
Pub Dt:
11/30/2006
Title:
MEMORY MANAGEMENT CIRCUITRY TRANSLATION INFORMATION RETREIVAL DURING DEBUGGING
2
Patent #:
7299335
Issue Dt:
11/20/2007
Application #:
11140310
Filing Dt:
05/27/2005
Publication #:
US20060271919
Pub Dt:
11/30/2006
Title:
TRANSLATION INFORMATION RETRIEVAL TRANSPARENT TO PROCESSOR CORE
3
Patent #:
7569443
Issue Dt:
08/04/2009
Application #:
11159430
Filing Dt:
06/21/2005
Publication #:
US20060286729
Pub Dt:
12/21/2006
Title:
COMPLEMENTARY METAL OXIDE SEMICONDUCTOR INTEGRATED CIRCUIT USING RAISED SOURCE DRAIN AND REPLACEMENT METAL GATE
4
Patent #:
7525160
Issue Dt:
04/28/2009
Application #:
11320309
Filing Dt:
12/27/2005
Publication #:
US20070145487
Pub Dt:
06/28/2007
Title:
MULTIGATE DEVICE WITH RECESSED STRAIN REGIONS
5
Patent #:
7691752
Issue Dt:
04/06/2010
Application #:
11694458
Filing Dt:
03/30/2007
Publication #:
US20080237742
Pub Dt:
10/02/2008
Title:
METHODS OF FORMING IMPROVED EPI FILL ON NARROW ISOLATION BOUNDED SOURCE/DRAIN REGIONS AND STRUCTURES FORMED THEREBY
6
Patent #:
7732285
Issue Dt:
06/08/2010
Application #:
11729189
Filing Dt:
03/28/2007
Publication #:
US20080242037
Pub Dt:
10/02/2008
Title:
SEMICONDUCTOR DEVICE HAVING SELF-ALIGNED EPITAXIAL SOURCE AND DRAIN EXTENSIONS
7
Patent #:
7821061
Issue Dt:
10/26/2010
Application #:
11729565
Filing Dt:
03/29/2007
Publication #:
US20080237575
Pub Dt:
10/02/2008
Title:
SILICON GERMANIUM AND GERMANIUM MULTIGATE AND NANOWIRE STRUCTURES FOR LOGIC AND MULTILEVEL MEMORY APPLICATIONS
8
Patent #:
8108614
Issue Dt:
01/31/2012
Application #:
11967413
Filing Dt:
12/31/2007
Publication #:
US20090172291
Pub Dt:
07/02/2009
Title:
MECHANISM FOR EFFECTIVELY CACHING STREAMING AND NON-STREAMING DATA PATTERNS
9
Patent #:
7727830
Issue Dt:
06/01/2010
Application #:
12006273
Filing Dt:
12/31/2007
Publication #:
US20090170251
Pub Dt:
07/02/2009
Title:
FABRICATION OF GERMANIUM NANOWIRE TRANSISTORS
10
Patent #:
8402290
Issue Dt:
03/19/2013
Application #:
12263421
Filing Dt:
10/31/2008
Publication #:
US20100115304
Pub Dt:
05/06/2010
Title:
POWER MANAGEMENT FOR MULTIPLE PROCESSOR CORES
11
Patent #:
8148786
Issue Dt:
04/03/2012
Application #:
12493291
Filing Dt:
06/29/2009
Publication #:
US20090261391
Pub Dt:
10/22/2009
Title:
COMPLEMENTARY METAL OXIDE SEMICONDUCTOR INTEGRATED CIRCUIT USING RAISED SOURCE DRAIN AND REPLACEMENT METAL GATE
12
Patent #:
8269209
Issue Dt:
09/18/2012
Application #:
12653847
Filing Dt:
12/18/2009
Publication #:
US20110147697
Pub Dt:
06/23/2011
Title:
ISOLATION FOR NANOWIRE DEVICES
13
Patent #:
8110458
Issue Dt:
02/07/2012
Application #:
12762585
Filing Dt:
04/19/2010
Publication #:
US20100200835
Pub Dt:
08/12/2010
Title:
FABRICATION OF GERMANIUM NANOWIRE TRANSISTORS
14
Patent #:
8722478
Issue Dt:
05/13/2014
Application #:
12885071
Filing Dt:
09/17/2010
Publication #:
US20110008937
Pub Dt:
01/13/2011
Title:
SILICON GERMANIUM AND GERMANIUM MULTIGATE AND NANOWIRE STRUCTURES FOR LOGIC AND MULTILEVEL MEMORY APPLICATIONS
15
Patent #:
8188792
Issue Dt:
05/29/2012
Application #:
12889772
Filing Dt:
09/24/2010
Title:
TECHNIQUES FOR CURRENT MIRROR CIRCUITS
16
Patent #:
8065488
Issue Dt:
11/22/2011
Application #:
12908183
Filing Dt:
10/20/2010
Publication #:
US20110099333
Pub Dt:
04/28/2011
Title:
MECHANISM FOR EFFECTIVELY CACHING STREAMING AND NON-STREAMING DATA PATTERNS
17
Patent #:
8716859
Issue Dt:
05/06/2014
Application #:
13346993
Filing Dt:
01/10/2012
Publication #:
US20130175686
Pub Dt:
07/11/2013
Title:
ENHANCED FLIP CHIP PACKAGE
18
Patent #:
8883573
Issue Dt:
11/11/2014
Application #:
13563456
Filing Dt:
07/31/2012
Publication #:
US20120309173
Pub Dt:
12/06/2012
Title:
ISOLATION FOR NANOWIRE DEVICES
19
Patent #:
8765563
Issue Dt:
07/01/2014
Application #:
13630527
Filing Dt:
09/28/2012
Publication #:
US20140091360
Pub Dt:
04/03/2014
Title:
TRENCH CONFINED EPITAXIALLY GROWN DEVICE LAYER(S)
20
Patent #:
8896066
Issue Dt:
11/25/2014
Application #:
13685369
Filing Dt:
11/26/2012
Publication #:
US20130154016
Pub Dt:
06/20/2013
Title:
TIN DOPED III-V MATERIAL CONTACTS
21
Patent #:
9136343
Issue Dt:
09/15/2015
Application #:
13749139
Filing Dt:
01/24/2013
Publication #:
US20140203327
Pub Dt:
07/24/2014
Title:
DEEP GATE-ALL-AROUND SEMICONDUCTOR DEVICE HAVING GERMANIUM OR GROUP III-V ACTIVE LAYER
22
Patent #:
8907480
Issue Dt:
12/09/2014
Application #:
13802848
Filing Dt:
03/14/2013
Publication #:
US20140264832
Pub Dt:
09/18/2014
Title:
CHIP ARRANGEMENTS
23
Patent #:
NONE
Issue Dt:
Application #:
13847392
Filing Dt:
03/19/2013
Publication #:
US20130219196
Pub Dt:
08/22/2013
Title:
POWER MANAGEMENT FOR MULTIPLE PROCESSOR CORES
24
Patent #:
9153583
Issue Dt:
10/06/2015
Application #:
13976074
Filing Dt:
06/26/2013
Publication #:
US20130285155
Pub Dt:
10/31/2013
Title:
III-V LAYERS FOR N-TYPE AND P-TYPE MOS SOURCE-DRAIN CONTACTS
25
Patent #:
9059024
Issue Dt:
06/16/2015
Application #:
13976075
Filing Dt:
06/26/2013
Publication #:
US20130277752
Pub Dt:
10/24/2013
Title:
SELF-ALIGNED CONTACT METALLIZATION FOR REDUCED CONTACT RESISTANCE
26
Patent #:
9240410
Issue Dt:
01/19/2016
Application #:
13976413
Filing Dt:
06/26/2013
Publication #:
US20130279145
Pub Dt:
10/24/2013
Title:
GROUP III-N NANOWIRE TRANSISTORS
27
Patent #:
8994174
Issue Dt:
03/31/2015
Application #:
13994660
Filing Dt:
06/14/2013
Publication #:
US20130264707
Pub Dt:
10/10/2013
Title:
Structure having a planar bonding surface
28
Patent #:
10483385
Issue Dt:
11/19/2019
Application #:
13995914
Filing Dt:
06/19/2013
Publication #:
US20140209855
Pub Dt:
07/31/2014
Title:
NANOWIRE STRUCTURES HAVING WRAP-AROUND CONTACTS
29
Patent #:
9087863
Issue Dt:
07/21/2015
Application #:
13995930
Filing Dt:
06/19/2013
Publication #:
US20140042386
Pub Dt:
02/13/2014
Title:
NANOWIRE STRUCTURES HAVING NON-DISCRETE SOURCE AND DRAIN REGIONS
30
Patent #:
10424580
Issue Dt:
09/24/2019
Application #:
13996505
Filing Dt:
06/20/2013
Publication #:
US20130313513
Pub Dt:
11/28/2013
Title:
SEMICONDUCTOR DEVICES HAVING MODULATED NANOWIRE COUNTS
31
Patent #:
9559160
Issue Dt:
01/31/2017
Application #:
13996506
Filing Dt:
06/20/2013
Publication #:
US20130320294
Pub Dt:
12/05/2013
Title:
COMMON-SUBSTRATE SEMICONDUCTOR DEVICES HAVING NANOWIRES OR SEMICONDUCTOR BODIES WITH DIFFERING MATERIAL ORIENTATION OR COMPOSITION
32
Patent #:
9627357
Issue Dt:
04/18/2017
Application #:
13997152
Filing Dt:
06/21/2013
Publication #:
US20130292840
Pub Dt:
11/07/2013
Title:
STACKED MEMORY ALLOWING VARIANCE IN DEVICE INTERCONNECTS
33
Patent #:
9653559
Issue Dt:
05/16/2017
Application #:
13997166
Filing Dt:
06/21/2013
Publication #:
US20130320417
Pub Dt:
12/05/2013
Title:
METHODS TO ENHANCE DOPING CONCENTRATION IN NEAR-SURFACE LAYERS OF SEMICONDUCTORS AND METHODS OF MAKING SAME
34
Patent #:
9056763
Issue Dt:
06/16/2015
Application #:
14039157
Filing Dt:
09/27/2013
Publication #:
US20150091167
Pub Dt:
04/02/2015
Title:
STRESS BUFFER LAYER FOR INTEGRATED MICROELECTROMECHANICAL SYSTEMS (MEMS)
35
Patent #:
9059304
Issue Dt:
06/16/2015
Application #:
14164289
Filing Dt:
01/27/2014
Publication #:
US20140138827
Pub Dt:
05/22/2014
Title:
ENHANCED FLIP CHIP PACKAGE
36
Patent #:
8936974
Issue Dt:
01/20/2015
Application #:
14184999
Filing Dt:
02/20/2014
Publication #:
US20140170817
Pub Dt:
06/19/2014
Title:
SILICON GERMANIUM AND GERMANIUM MULTIGATE AND NANOWIRE STRUCTURES FOR LOGIC AND MULTILEVEL MEMORY APPLICATIONS
37
Patent #:
9634007
Issue Dt:
04/25/2017
Application #:
14302350
Filing Dt:
06/11/2014
Publication #:
US20140291726
Pub Dt:
10/02/2014
Title:
TRENCH CONFINED EPITAXIALLY GROWN DEVICE LAYER(S)
38
Patent #:
9385105
Issue Dt:
07/05/2016
Application #:
14370971
Filing Dt:
07/08/2014
Publication #:
US20150028478
Pub Dt:
01/29/2015
Title:
SEMICONDUCTOR DEVICES
39
Patent #:
9343302
Issue Dt:
05/17/2016
Application #:
14571579
Filing Dt:
12/16/2014
Publication #:
US20150099349
Pub Dt:
04/09/2015
Title:
SILICON GERMANIUM AND GERMANIUM MULTIGATE AND NANOWIRE STRUCTURES FOR LOGIC AND MULTILEVEL MEMORY APPLICATIONS
40
Patent #:
9252111
Issue Dt:
02/02/2016
Application #:
14625579
Filing Dt:
02/18/2015
Publication #:
US20150162290
Pub Dt:
06/11/2015
Title:
METHOD FOR HANDLING VERY THIN DEVICE WAFERS
41
Patent #:
9550670
Issue Dt:
01/24/2017
Application #:
14731211
Filing Dt:
06/04/2015
Publication #:
US20150266728
Pub Dt:
09/24/2015
Title:
STRESS BUFFER LAYER FOR INTEGRATED MICROELECTROMECHANICAL SYSTEMS (MEMS)
42
Patent #:
9224735
Issue Dt:
12/29/2015
Application #:
14739994
Filing Dt:
06/15/2015
Publication #:
US20150311204
Pub Dt:
10/29/2015
Title:
SELF-ALIGNED CONTACT METALLIZATION FOR REDUCED CONTACT RESISTANCE
43
Patent #:
9711492
Issue Dt:
07/18/2017
Application #:
14778036
Filing Dt:
09/17/2015
Publication #:
US20160358897
Pub Dt:
12/08/2016
Title:
THREE DIMENSIONAL STRUCTURES WITHIN MOLD COMPOUND
44
Patent #:
9564522
Issue Dt:
02/07/2017
Application #:
14803919
Filing Dt:
07/20/2015
Publication #:
US20150325648
Pub Dt:
11/12/2015
Title:
NANOWIRE STRUCTURES HAVING NON-DISCRETE SOURCE AND DRAIN REGIONS
45
Patent #:
9337291
Issue Dt:
05/10/2016
Application #:
14821561
Filing Dt:
08/07/2015
Publication #:
US20150349077
Pub Dt:
12/03/2015
Title:
DEEP GATE-ALL-AROUND SEMICONDUCTOR DEVICE HAVING GERMANIUM OR GROUP III-V ACTIVE LAYER
46
Patent #:
9397102
Issue Dt:
07/19/2016
Application #:
14875167
Filing Dt:
10/05/2015
Publication #:
US20160027781
Pub Dt:
01/28/2016
Title:
III-V LAYERS FOR N-TYPE AND P-TYPE MOS SOURCE-DRAIN CONTACTS
47
Patent #:
9397188
Issue Dt:
07/19/2016
Application #:
14936609
Filing Dt:
11/09/2015
Publication #:
US20160064512
Pub Dt:
03/03/2016
Title:
GROUP III-N NANOWIRE TRANSISTORS
48
Patent #:
9754940
Issue Dt:
09/05/2017
Application #:
14981206
Filing Dt:
12/28/2015
Publication #:
US20160118384
Pub Dt:
04/28/2016
Title:
SELF-ALIGNED CONTACT METALLIZATION FOR REDUCED CONTACT RESISTANCE
49
Patent #:
9691843
Issue Dt:
06/27/2017
Application #:
14996038
Filing Dt:
01/14/2016
Publication #:
US20160133735
Pub Dt:
05/12/2016
Title:
COMMON-SUBSTRATE SEMICONDUCTOR DEVICES HAVING NANOWIRES OR SEMICONDUCTOR BODIES WITH DIFFERING MATERIAL ORIENTATION OR COMPOSITION
50
Patent #:
9741651
Issue Dt:
08/22/2017
Application #:
15052505
Filing Dt:
02/24/2016
Publication #:
US20170243815
Pub Dt:
08/24/2017
Title:
REDISTRIBUTION LAYER LINES
51
Patent #:
9640671
Issue Dt:
05/02/2017
Application #:
15134093
Filing Dt:
04/20/2016
Publication #:
US20160233344
Pub Dt:
08/11/2016
Title:
DEEP GATE-ALL-AROUND SEMICONDUCTOR DEVICE HAVING GERMANIUM OR GROUP III-V ACTIVE LAYER
52
Patent #:
9859253
Issue Dt:
01/02/2018
Application #:
15196937
Filing Dt:
06/29/2016
Publication #:
US20180005989
Pub Dt:
01/04/2018
Title:
INTEGRATED CIRCUIT PACKAGE STACK
53
Patent #:
9691857
Issue Dt:
06/27/2017
Application #:
15197615
Filing Dt:
06/29/2016
Publication #:
US20160315153
Pub Dt:
10/27/2016
Title:
GROUP III-N NANOWIRE TRANSISTORS
54
Patent #:
9705000
Issue Dt:
07/11/2017
Application #:
15212991
Filing Dt:
07/18/2016
Publication #:
US20160329431
Pub Dt:
11/10/2016
Title:
III-V LAYERS FOR N-TYPE AND P-TYPE MOS SOURCE-DRAIN CONTACTS
55
Patent #:
10580899
Issue Dt:
03/03/2020
Application #:
15405899
Filing Dt:
01/13/2017
Publication #:
US20170141239
Pub Dt:
05/18/2017
Title:
NANOWIRE STRUCTURES HAVING NON-DISCRETE SOURCE AND DRAIN REGIONS
56
Patent #:
NONE
Issue Dt:
Application #:
15435245
Filing Dt:
02/16/2017
Publication #:
US20170162453
Pub Dt:
06/08/2017
Title:
CMOS HAVING A Ge CHANNEL PMOS AND III-V CHANNEL NMOS FORMED ON A SILICON SUBSTRATE
57
Patent #:
10026845
Issue Dt:
07/17/2018
Application #:
15465448
Filing Dt:
03/21/2017
Publication #:
US20170194506
Pub Dt:
07/06/2017
Title:
DEEP GATE-ALL-AROUND SEMICONDUCTOR DEVICE HAVING GERMANIUM OR GROUP III-V ACTIVE LAYER
58
Patent #:
10186581
Issue Dt:
01/22/2019
Application #:
15623165
Filing Dt:
06/14/2017
Publication #:
US20170288022
Pub Dt:
10/05/2017
Title:
GROUP III-N NANOWIRE TRANSISTORS
59
Patent #:
NONE
Issue Dt:
Application #:
15677835
Filing Dt:
08/15/2017
Publication #:
US20180068939
Pub Dt:
03/08/2018
Title:
REDISTRIBUTION LAYER LINES
60
Patent #:
10950733
Issue Dt:
03/16/2021
Application #:
16011308
Filing Dt:
06/18/2018
Publication #:
US20180301563
Pub Dt:
10/18/2018
Title:
DEEP GATE-ALL-AROUND SEMICONDUCTOR DEVICE HAVING GERMANIUM OR GROUP III-V ACTIVE LAYER
61
Patent #:
10541305
Issue Dt:
01/21/2020
Application #:
16246356
Filing Dt:
01/11/2019
Publication #:
US20190165106
Pub Dt:
05/30/2019
Title:
GROUP III-N NANOWIRE TRANSISTORS
62
Patent #:
10840366
Issue Dt:
11/17/2020
Application #:
16592380
Filing Dt:
10/03/2019
Publication #:
US20200035818
Pub Dt:
01/30/2020
Title:
NANOWIRE STRUCTURES HAVING WRAP-AROUND CONTACTS
63
Patent #:
11552197
Issue Dt:
01/10/2023
Application #:
16740089
Filing Dt:
01/10/2020
Publication #:
US20200152797
Pub Dt:
05/14/2020
Title:
NANOWIRE STRUCTURES HAVING NON-DISCRETE SOURCE AND DRAIN REGIONS
64
Patent #:
11757026
Issue Dt:
09/12/2023
Application #:
17072992
Filing Dt:
10/16/2020
Publication #:
US20210036137
Pub Dt:
02/04/2021
Title:
NANOWIRE STRUCTURES HAVING WRAP-AROUND CONTACTS
Assignor
1
INTEL CORPORATION
Exec Dt:
11/13/2020
Assignee
1
GOOGLE LLC
1600 AMPHITHEATRE PARKWAY
MOUNTAIN VIEW, CALIFORNIA 94043
Correspondence name and address
LERNER, DAVID, LITTENBERG, KRUMHOLZ & MENTLIK, LLP
20 COMMERCE DR.
CRANFORD, NJ 07016

Search Results as of: 09/25/2024 06:58 PM
If you have any comments or questions concerning the data displayed, contact PRD / Assignments at 571-272-3350. v.2.6
Web interface last modified: August 25, 2017 v.2.6
| .HOME | INDEX| SEARCH | eBUSINESS | CONTACT US | PRIVACY STATEMENT