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Patent Assignment Details
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Reel/Frame:017836/0922   Pages: 3
Recorded: 04/28/2006
Conveyance: ASSIGNMENT OF ASSIGNORS INTEREST (SEE DOCUMENT FOR DETAILS).
Total properties: 1
1
Patent #:
NONE
Issue Dt:
Application #:
11413162
Filing Dt:
04/28/2006
Publication #:
Pub Dt:
06/28/2007
Title:
Method for fabricating semiconductor device having top round recess pattern
Assignors
1
Exec Dt:
04/26/2006
2
Exec Dt:
04/26/2006
Assignee
1
SAN 136-1, AMI-RI, BUBAL-EUB, ICHON-SHI
KYOUNGKI-DO 467-860, KOREA, REPUBLIC OF
Correspondence name and address
MR. ERNEST F. CHAPMAN
FINNEGAN, HENDERSON, FARABOW, ET AL
901 NEW YORK AVENUE, NW
WASHINGTON, D.C. 20001-4413

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