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Reel/Frame:	070298/0922			Pages:	4
		Recorded:	02/23/2025
Attorney Dkt #:	TENSG001
Conveyance:	CHANGE OF NAME (SEE DOCUMENT FOR DETAILS).

Total properties: 39

Patent #:	NONE	Issue Dt:		Application #:	15945454	Filing Dt:	04/04/2018
Publication #:	US20180293486	Pub Dt:	10/11/2018
Title:	CONDITIONAL GRAPH EXECUTION BASED ON PRIOR SIMPLIFIED GRAPH EXECUTION

Patent #:	10817293	Issue Dt:	10/27/2020	Application #:	15963315	Filing Dt:	04/26/2018
Publication #:	US20180314946	Pub Dt:	11/01/2018
Title:	PROCESSING CORE WITH METADATA ACTUATED CONDITIONAL GRAPH EXECUTION

Patent #:	10318317	Issue Dt:	06/11/2019	Application #:	15975930	Filing Dt:	05/10/2018
Publication #:	US20180329723	Pub Dt:	11/15/2018
Title:	PROCESSING CORE WITH OPERATION SUPPRESSION BASED ON CONTRIBUTION ESTIMATE

Patent #:	11113051	Issue Dt:	09/07/2021	Application #:	16153991	Filing Dt:	10/08/2018
Publication #:	US20190050224	Pub Dt:	02/14/2019
Title:	PROCESSING CORE WITH METADATA ACTUATED CONDITIONAL GRAPH EXECUTION

Patent #:	10585679	Issue Dt:	03/10/2020	Application #:	16416749	Filing Dt:	05/20/2019
Publication #:	US20190272183	Pub Dt:	09/05/2019
Title:	PROCESSING CORE WITH OPERATION SUPPRESSION BASED ON CONTRIBUTION ESTIMATE

Patent #:	10644721	Issue Dt:	05/05/2020	Application #:	16434065	Filing Dt:	06/06/2019
Publication #:	US20190379396	Pub Dt:	12/12/2019
Title:	PROCESSING CORE DATA COMPRESSION AND STORAGE SYSTEM

Patent #:	11010132	Issue Dt:	05/18/2021	Application #:	16573728	Filing Dt:	09/17/2019
Publication #:	US20200104098	Pub Dt:	04/02/2020
Title:	PROCESSING CORE WITH DATA ASSOCIATIVE ADAPTIVE ROUNDING

Patent #:	11301264	Issue Dt:	04/12/2022	Application #:	16788069	Filing Dt:	02/11/2020
Publication #:	US20200174799	Pub Dt:	06/04/2020
Title:	PROCESSING CORE WITH OPERATION SUPPRESSION BASED ON CONTRIBUTION ESTIMATE

Patent #:	10938413	Issue Dt:	03/02/2021	Application #:	16851943	Filing Dt:	04/17/2020
Publication #:	US20200244282	Pub Dt:	07/30/2020
Title:	PROCESSING CORE DATA COMPRESSION AND STORAGE SYSTEM

Patent #:	11245643	Issue Dt:	02/08/2022	Application #:	16879405	Filing Dt:	05/20/2020
Publication #:	US20210367905	Pub Dt:	11/25/2021
Title:	SPECULATIVE RESOURCE ALLOCATION FOR ROUTING ON INTERCONNECT FABRICS

Patent #:	11269628	Issue Dt:	03/08/2022	Application #:	16902035	Filing Dt:	06/15/2020
Publication #:	US20200401402	Pub Dt:	12/24/2020
Title:	PROCESSOR CORES USING PACKET IDENTIFIERS FOR ROUTING AND COMPUTATION

Patent #:	11467846	Issue Dt:	10/11/2022	Application #:	16942492	Filing Dt:	07/29/2020
Publication #:	US20210034373	Pub Dt:	02/04/2021
Title:	OVERLAY LAYER FOR NETWORK OF PROCESSOR CORES

Patent #:	11734224	Issue Dt:	08/22/2023	Application #:	17035046	Filing Dt:	03/19/2014
Publication #:	US20220100503	Pub Dt:	03/31/2022
Title:	Overlay Layer Hardware Unit for Network of Processor Cores

Patent #:	12050913	Issue Dt:	07/30/2024	Application #:	17080433	Filing Dt:	10/26/2020
Publication #:	US20210042118	Pub Dt:	02/11/2021
Title:	Processing Core with Meta Data Actuated Conditional Graph Execution

Patent #:	11934897	Issue Dt:	03/19/2024	Application #:	17163124	Filing Dt:	01/29/2021
Publication #:	US20220245009	Pub Dt:	08/04/2022
Title:	APPLICATION DATA FLOW GRAPH EXECUTION USING NETWORK-ON-CHIP OVERLAY

Patent #:	12321855	Issue Dt:	06/03/2025	Application #:	17221469	Filing Dt:	04/02/2021
Publication #:	US20220318614	Pub Dt:	10/06/2022
Title:	GRAPH EXECUTION USING ACCESS REQUEST RESPONSE DYNAMIC BATCH ASSEMBLY

Patent #:	11520701	Issue Dt:	12/06/2022	Application #:	17221523	Filing Dt:	04/02/2021
Publication #:	US20220318144	Pub Dt:	10/06/2022
Title:	DATA STRUCTURE OPTIMIZED DEDICATED MEMORY CACHES

Patent #:	11645041	Issue Dt:	05/09/2023	Application #:	17321925	Filing Dt:	05/17/2021
Publication #:	US20210271450	Pub Dt:	09/02/2021
Title:	PROCESSING CORE WITH DATA ASSOCIATIVE ADAPTIVE ROUNDING

Patent #:	11599358	Issue Dt:	03/07/2023	Application #:	17401005	Filing Dt:	08/12/2021
Publication #:	US20230051122	Pub Dt:	02/16/2023
Title:	PRE-STAGED INSTRUCTION REGISTERS FOR VARIABLE LENGTH INSTRUCTION SET MACHINE

Patent #:	NONE	Issue Dt:		Application #:	17409577	Filing Dt:	08/23/2021
Publication #:	US20210382716	Pub Dt:	12/09/2021
Title:	PROCESSING CORE WITH METADATA ACTUATED CONDITIONAL GRAPH EXECUTION

Patent #:	11709662	Issue Dt:	07/25/2023	Application #:	17519947	Filing Dt:	11/05/2021
Publication #:	US20230146541	Pub Dt:	05/11/2023
Title:	Sparsity Uniformity Enforcement for Multicore Processor

Patent #:	11693639	Issue Dt:	07/04/2023	Application #:	17520084	Filing Dt:	11/05/2021
Publication #:	US20230143538	Pub Dt:	05/11/2023
Title:	Sparsity Uniformity Enforcement for Multicore Processor

Patent #:	12118060	Issue Dt:	10/15/2024	Application #:	17545860	Filing Dt:	12/08/2021
Publication #:	US20230177106	Pub Dt:	06/08/2023
Title:	COMPUTATIONAL CIRCUIT WITH HIERARCHICAL ACCUMULATOR

Patent #:	NONE	Issue Dt:		Application #:	17559952	Filing Dt:	12/22/2021
Publication #:	US20230196124	Pub Dt:	06/22/2023
Title:	RUNTIME PREDICTORS FOR NEURAL NETWORK COMPUTATION REDUCTION

Patent #:	NONE	Issue Dt:		Application #:	17589446	Filing Dt:	01/31/2022
Publication #:	US20230259579	Pub Dt:	08/17/2023
Title:	RUNTIME PREDICTORS FOR COMPUTATION REDUCTION IN DEPENDENT COMPUTATIONS

Patent #:	11829752	Issue Dt:	11/28/2023	Application #:	17686003	Filing Dt:	03/03/2022
Publication #:	US20220188106	Pub Dt:	06/16/2022
Title:	PROCESSOR CORES USING PACKET IDENTIFIERS FOR ROUTING AND COMPUTATION

Patent #:	NONE	Issue Dt:		Application #:	17705867	Filing Dt:	03/28/2022
Publication #:	US20220222086	Pub Dt:	07/14/2022
Title:	PROCESSING CORE WITH OPERATION SUPPRESSION BASED ON CONTRIBUTION ESTIMATE

Patent #:	11960885	Issue Dt:	04/16/2024	Application #:	17717769	Filing Dt:	04/11/2022
Publication #:	US20230325183	Pub Dt:	10/12/2023
Title:	SEAMLESS PLACE AND ROUTE FOR HETEROGENEOUS NETWORK OF PROCESSOR CORES

Patent #:	12248430	Issue Dt:	03/11/2025	Application #:	17945045	Filing Dt:	09/14/2022
Publication #:	US20230041130	Pub Dt:	02/09/2023
Title:	OVERLAY LAYER FOR NETWORK OF PROCESSOR CORES

Patent #:	12399713	Issue Dt:	08/26/2025	Application #:	17955539	Filing Dt:	09/29/2022
Publication #:	US20240111525	Pub Dt:	04/04/2024
Title:	MULTIPLICATION HARDWARE BLOCK WITH ADAPTIVE FIDELITY CONTROL SYSTEM

Patent #:	12019546	Issue Dt:	06/25/2024	Application #:	17982467	Filing Dt:	11/07/2022
Publication #:	US20230062891	Pub Dt:	03/02/2023
Title:	DATA STRUCTURE OPTIMIZED DEDICATED MEMORY CACHES

Patent #:	12067395	Issue Dt:	08/20/2024	Application #:	18098068	Filing Dt:	01/17/2023
Publication #:	US20230153110	Pub Dt:	05/18/2023
Title:	PRE-STAGED INSTRUCTION REGISTERS FOR VARIABLE LENGTH INSTRUCTION SET MACHINE

Patent #:	12236237	Issue Dt:	02/25/2025	Application #:	18129808	Filing Dt:	03/26/2021
Publication #:	US20230236831	Pub Dt:	07/27/2023
Title:	PROCESSOR CORES USING CONTENT OBJECT IDENTIFIERS FOR ROUTING AND COMPUTATION

Patent #:	12039289	Issue Dt:	07/16/2024	Application #:	18132962	Filing Dt:	04/10/2023
Publication #:	US20230244447	Pub Dt:	08/03/2023
Title:	PROCESSING CORE WITH DATA ASSOCIATIVE ADAPTIVE ROUNDING

Patent #:	12210478	Issue Dt:	01/28/2025	Application #:	18196418	Filing Dt:	05/11/2023
Publication #:	US20230281155	Pub Dt:	09/07/2023
Title:	OVERLAY LAYER HARDWARE UNIT FOR NETWORK OF PROCESSOR CORES

Patent #:	12260197	Issue Dt:	03/25/2025	Application #:	18202252	Filing Dt:	05/25/2023
Publication #:	US20230325160	Pub Dt:	10/12/2023
Title:	SPARSITY UNIFORMITY ENFORCEMENT FOR MULTICORE PROCESSOR

Patent #:	12367041	Issue Dt:	07/22/2025	Application #:	18609307	Filing Dt:	03/19/2024
Publication #:	US20240319996	Pub Dt:	09/26/2024
Title:	SEAMLESS PLACE AND ROUTE FOR HETEROGENEOUS NETWORK OF PROCESSOR CORES

Patent #:	12340185	Issue Dt:	06/24/2025	Application #:	18746561	Filing Dt:	06/18/2024
Publication #:	US20240338176	Pub Dt:	10/10/2024
Title:	PROCESSING CORE WITH DATA ASSOCIATIVE ADAPTIVE ROUNDING

Patent #:	NONE	Issue Dt:		Application #:	18756494	Filing Dt:	06/27/2024
Publication #:	US20240345840	Pub Dt:	10/17/2024
Title:	PROCESSING CORE WITH METADATA ACTUATED CONDITIONAL GRAPH EXECUTION

Assignor

TENSTORRENT INC.

Exec Dt:

12/06/2023

Assignee

TENSTORRENT AI INC.

150 FERRAND DRIVE, SUITE #901

TORONTO, CANADA M3C 3E5

Correspondence name and address
	ERIC SCHEUERLEIN
	3790 EL CAMINO REAL,
	UNIT #531
	PALO ALTO, CA 94306

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