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Reel/Frame:017197/0923   Pages: 3
Recorded: 01/13/2006
Conveyance: CORRECTED COVER SHEET TO CORRECT EXECUTION DATE FOR THE 2ND AND 3RD ASSIGNOR'S, PREVIOUSLY RECORDED AT REEL/FRAME 016086/0226 (ASSIGNMENT OF ASSIGNOR'S INTEREST)
Total properties: 1
1
Patent #:
Issue Dt:
02/12/2008
Application #:
11009466
Filing Dt:
12/13/2004
Publication #:
Pub Dt:
05/12/2005
Title:
CACHE CONTROL METHOD AND PROCESSOR SYSTEM
Assignors
1
Exec Dt:
11/22/2004
2
Exec Dt:
11/22/2004
3
Exec Dt:
11/22/2004
4
Exec Dt:
11/24/2004
Assignee
1
1-1, KAMIKODANAKA 4-CHOME
NAKAHARA-KU, KAWASAKI-SHI
KANAGAWA 211-8588, JAPAN
Correspondence name and address
STAAS & HALSEY LLP
H.J. STAAS
1201 NEW YORK AVE., N.W.
SUITE 700
WASHINGTON, D.C. 20005

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