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Patent #:
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Issue Dt:
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12/27/2005
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Application #:
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10901765
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Filing Dt:
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07/29/2004
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Publication #:
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Pub Dt:
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01/06/2005
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Title:
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SCANNING TIP ORIENTATION ADJUSTMENT METHOD FOR ATOMIC FORCE MICROSCOPY
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Patent #:
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Issue Dt:
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10/17/2006
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Application #:
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10904582
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Filing Dt:
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11/17/2004
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Publication #:
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Pub Dt:
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05/18/2006
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Title:
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METHOD OF FABRICATING A BOTTLE TRENCH AND A BOTTLE TRENCH CAPACITOR
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Patent #:
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Issue Dt:
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07/31/2007
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Application #:
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10921766
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Filing Dt:
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08/19/2004
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Publication #:
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Pub Dt:
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02/23/2006
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Title:
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SEMICONDUCTOR MEMORY DEVICE COMPRISING MEMORY CELLS WITH FLOATING GATE ELECTRODE AND METHOD OF PRODUCTION
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Patent #:
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Issue Dt:
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09/18/2007
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Application #:
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10928616
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Filing Dt:
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08/27/2004
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Publication #:
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Pub Dt:
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03/02/2006
| | | | |
Title:
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CIRCUIT BOARD AND METHOD FOR PRODUCING A CIRCUIT BOARD
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Patent #:
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Issue Dt:
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05/20/2008
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Application #:
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10938845
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Filing Dt:
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09/13/2004
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Publication #:
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Pub Dt:
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03/16/2006
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Title:
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SEMICONDUCTOR CHIP WITH FLEXIBLE CONTACTS AT A FACE
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Patent #:
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Issue Dt:
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11/07/2006
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Application #:
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10939255
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Filing Dt:
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09/10/2004
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Publication #:
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Pub Dt:
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03/16/2006
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Title:
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TRANSISTOR, MEMORY CELL ARRAY AND METHOD OF MANUFACTURING A TRANSISTOR
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Patent #:
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Issue Dt:
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06/13/2006
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Application #:
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10952233
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Filing Dt:
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09/28/2004
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Publication #:
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Pub Dt:
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03/30/2006
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Title:
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NON-VOLATILE SEMICONDUCTOR MEMORY DEVICE
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Patent #:
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Issue Dt:
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09/09/2008
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Application #:
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10952707
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Filing Dt:
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09/29/2004
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Publication #:
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Pub Dt:
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04/06/2006
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Title:
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CHARGE-TRAPPING MEMORY CELL AND CHARGE-TRAPPING MEMORY DEVICE
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Patent #:
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Issue Dt:
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04/04/2006
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Application #:
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10953606
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Filing Dt:
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09/30/2004
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Publication #:
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Pub Dt:
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04/06/2006
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Title:
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RESISTIVE MEMORY ELEMENT
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Patent #:
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Issue Dt:
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02/20/2007
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Application #:
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10954869
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Filing Dt:
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09/30/2004
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Publication #:
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Pub Dt:
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03/30/2006
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Title:
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MEMORY DEVICE, MEMORY CONTROLLER AND MEMORY SYSTEM HAVING BIDIRECTIONAL CLOCK LINES
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Patent #:
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Issue Dt:
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02/06/2007
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Application #:
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10955177
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Filing Dt:
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09/30/2004
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Publication #:
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Pub Dt:
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03/30/2006
| | | | |
Title:
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MEMORY SYSTEM WITH TWO CLOCK LINES AND A MEMORY DEVICE
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Patent #:
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Issue Dt:
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09/19/2006
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Application #:
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10957803
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Filing Dt:
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10/04/2004
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Publication #:
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Pub Dt:
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04/06/2006
| | | | |
Title:
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FLEXIBLE BLENDER
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Patent #:
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Issue Dt:
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10/21/2008
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Application #:
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10958464
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Filing Dt:
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10/05/2004
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Publication #:
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Pub Dt:
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04/06/2006
| | | | |
Title:
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GATE LAYER DIODE METHOD AND APPARATUS
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Patent #:
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Issue Dt:
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08/22/2006
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Application #:
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10964102
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Filing Dt:
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10/13/2004
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Publication #:
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Pub Dt:
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04/13/2006
| | | | |
Title:
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MEASURING FLARE IN SEMICONDUCTOR LITHOGRAPHY
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Patent #:
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Issue Dt:
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09/05/2006
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Application #:
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10966776
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Filing Dt:
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10/15/2004
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Publication #:
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Pub Dt:
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04/20/2006
| | | | |
Title:
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COMBINED RECEIVER AND LATCH
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Patent #:
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Issue Dt:
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02/27/2007
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Application #:
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10967768
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Filing Dt:
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10/18/2004
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Publication #:
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Pub Dt:
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04/20/2006
| | | | |
Title:
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DQS FOR DATA FROM A MEMORY ARRAY
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Patent #:
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Issue Dt:
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04/24/2007
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Application #:
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10967869
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Filing Dt:
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10/18/2004
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Publication #:
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Pub Dt:
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04/20/2006
| | | | |
Title:
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EDGE PROTECTION PROCESS FOR SEMICONDUCTOR DEVICE FABRICATION
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Patent #:
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Issue Dt:
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08/01/2006
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Application #:
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10969343
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Filing Dt:
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10/21/2004
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Publication #:
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Pub Dt:
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04/27/2006
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Title:
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SIMULATING A FLOATING WORDLINE CONDITION IN A MEMORY DEVICE, AND RELATED TECHNIQUES
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Patent #:
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Issue Dt:
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05/16/2006
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Application #:
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10973389
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Filing Dt:
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10/27/2004
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Publication #:
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Pub Dt:
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04/27/2006
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Title:
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METHOD AND APPARATUS COMPENSATING FOR FREQUENCY DRIFT IN A DELAY LOCKED LOOP
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Patent #:
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Issue Dt:
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04/10/2007
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Application #:
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10974019
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Filing Dt:
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10/27/2004
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Publication #:
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Pub Dt:
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04/27/2006
| | | | |
Title:
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SEMICONDUCTOR MEMORY HAVING TRI-STATE DRIVER DEVICE
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Patent #:
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Issue Dt:
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04/03/2007
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Application #:
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10974521
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Filing Dt:
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10/27/2004
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Publication #:
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Pub Dt:
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04/27/2006
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Title:
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CIRCUIT HAVING DELAY LOCKED LOOP FOR CORRECTING OFF CHIP DRIVER DUTY DISTORTION
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Patent #:
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Issue Dt:
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10/03/2006
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Application #:
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10974564
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Filing Dt:
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10/27/2004
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Publication #:
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Pub Dt:
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04/27/2006
| | | | |
Title:
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VARIABLE DELAY LINE USING TWO BLENDER DELAYS
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Patent #:
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Issue Dt:
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08/22/2006
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Application #:
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10976159
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Filing Dt:
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10/29/2004
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Publication #:
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Pub Dt:
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05/04/2006
| | | | |
Title:
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METHOD FOR DETERMINING AN OPTIMAL ABSORBER STACK GEOMETRY OF A LITHOGRAPHIC REFLECTION MASK
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Patent #:
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Issue Dt:
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01/09/2007
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Application #:
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10980301
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Filing Dt:
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11/04/2004
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Publication #:
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Pub Dt:
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05/18/2006
| | | | |
Title:
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APPARATUS AND METHOD FOR MAKING GROUND CONNECTION
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Patent #:
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Issue Dt:
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08/15/2006
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Application #:
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10981947
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Filing Dt:
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11/05/2004
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Publication #:
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Pub Dt:
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05/11/2006
| | | | |
Title:
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DUTY DISTORTION DETECTOR
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Patent #:
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Issue Dt:
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05/23/2006
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Application #:
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10986767
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Filing Dt:
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11/15/2004
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Publication #:
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Pub Dt:
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05/18/2006
| | | | |
Title:
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SEMICONDUCTOR MEMORY SYSTEM AND METHOD FOR THE TRANSFER OF WRITE AND READ DATA SIGNALS IN A SEMICONDUCTOR MEMORY SYSTEM
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Patent #:
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Issue Dt:
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09/04/2007
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Application #:
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10987812
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Filing Dt:
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11/12/2004
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Publication #:
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Pub Dt:
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05/18/2006
| | | | |
Title:
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MEMORY ACCESS USING MULTIPLE SETS OF ADDRESS/DATA LINES
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Patent #:
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Issue Dt:
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01/02/2007
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Application #:
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10990420
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Filing Dt:
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11/18/2004
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Publication #:
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Pub Dt:
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05/18/2006
| | | | |
Title:
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METHOD FOR FULL WAFER CONTACT PROBING, WAFER DESIGN AND PROBE CARD DEVICE WITH REDUCED PROBE CONTACTS
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Patent #:
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Issue Dt:
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01/16/2007
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Application #:
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10991434
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Filing Dt:
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11/19/2004
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Publication #:
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Pub Dt:
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05/25/2006
| | | | |
Title:
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FLEXIBLE INTERNAL ADDRESS COUNTING METHOD AND APPARATUS
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Patent #:
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Issue Dt:
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05/08/2007
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Application #:
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10992982
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Filing Dt:
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11/19/2004
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Publication #:
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Pub Dt:
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05/25/2006
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Title:
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ELIMINATING SYSTEMATIC PROCESS YIELD LOSS VIA PRECISION WAFER PLACEMENT ALIGNMENT
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Patent #:
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Issue Dt:
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07/25/2006
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Application #:
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10993250
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Filing Dt:
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11/19/2004
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Publication #:
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Pub Dt:
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05/25/2006
| | | | |
Title:
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RANDOM ACCESS MEMORY HAVING FAST COLUMN ACCESS
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Patent #:
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Issue Dt:
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03/27/2007
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Application #:
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10994977
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Filing Dt:
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11/22/2004
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Publication #:
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Pub Dt:
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05/25/2006
| | | | |
Title:
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ESD PROTECTION APPARATUS FOR AN ELECTRICAL DEVICE
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Patent #:
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Issue Dt:
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09/26/2006
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Application #:
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10995643
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Filing Dt:
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11/23/2004
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Publication #:
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Pub Dt:
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05/25/2006
| | | | |
Title:
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ENERGY ADJUSTED WRITE PULSES IN PHASE-CHANGE MEMORIES
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Patent #:
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Issue Dt:
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04/18/2006
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Application #:
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10995644
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Filing Dt:
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11/23/2004
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Title:
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MULTI-PULSE RESET WRITE SCHEME FOR PHASE-CHANGE MEMORIES
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Patent #:
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Issue Dt:
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03/14/2006
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Application #:
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10996669
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Filing Dt:
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11/24/2004
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Publication #:
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Pub Dt:
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07/14/2005
| | | | |
Title:
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POLYELECTROLYTE DISPENSING POLISHING PAD
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Patent #:
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Issue Dt:
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04/08/2008
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Application #:
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10998975
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Filing Dt:
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11/30/2004
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Publication #:
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Pub Dt:
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06/01/2006
| | | | |
Title:
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TRANSISTOR ARRAY FOR SEMICONDUCTOR MEMORY DEVICES AND METHOD FOR FABRICATING A VERTICAL CHANNEL TRANSISTOR ARRAY
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Patent #:
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Issue Dt:
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11/25/2008
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Application #:
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11000323
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Filing Dt:
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11/30/2004
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Publication #:
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Pub Dt:
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06/01/2006
| | | | |
Title:
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CIRCUIT AND METHOD FOR TRANSMITTING A SIGNAL
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Patent #:
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Issue Dt:
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11/20/2007
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Application #:
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11000350
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Filing Dt:
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11/30/2004
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Publication #:
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Pub Dt:
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06/01/2006
| | | | |
Title:
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CHARGE-TRAPPING MEMORY CELL AND METHOD FOR PRODUCTION
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Patent #:
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Issue Dt:
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02/19/2008
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Application #:
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11002148
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Filing Dt:
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12/03/2004
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Publication #:
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Pub Dt:
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06/08/2006
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Title:
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MEMORY MODULE WITH A CLOCK SIGNAL REGENERATION CIRCUIT AND A REGISTER CIRCUIT FOR TEMPORARILY STORING THE INCOMING COMMAND AND ADDRESS SIGNALS
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Patent #:
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Issue Dt:
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11/21/2006
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Application #:
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11004881
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Filing Dt:
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12/07/2004
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Publication #:
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Pub Dt:
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06/08/2006
| | | | |
Title:
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MEMORY CELL ARRAY
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Patent #:
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|
Issue Dt:
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04/25/2006
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Application #:
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11005045
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Filing Dt:
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12/07/2004
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Title:
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MEMORY DEVICE AND METHOD OF MANUFACTURING A MEMORY DEVICE
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Patent #:
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|
Issue Dt:
|
04/11/2006
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Application #:
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11006484
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Filing Dt:
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12/07/2004
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Title:
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METHOD FOR PRODUCTION OF CHARGE-TRAPPING MEMORY DEVICES
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Patent #:
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Issue Dt:
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04/10/2007
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Application #:
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11006865
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Filing Dt:
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12/08/2004
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Publication #:
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Pub Dt:
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06/08/2006
| | | | |
Title:
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INTEGRATED DRAM MEMORY DEVICE
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Patent #:
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Issue Dt:
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09/04/2007
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Application #:
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11010182
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Filing Dt:
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12/10/2004
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Publication #:
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Pub Dt:
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06/15/2006
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Title:
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MEMORY RANK DECODER FOR A MULTI-RANK DUAL INLINE MEMORY MODULE (DIMM)
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Patent #:
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Issue Dt:
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04/03/2007
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Application #:
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11010942
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Filing Dt:
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12/10/2004
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Publication #:
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Pub Dt:
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06/15/2006
| | | | |
Title:
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STACKED DRAM MEMORY CHIP FOR A DUAL INLINE MEMORY MODULE (DIMM)
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Patent #:
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Issue Dt:
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04/24/2007
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Application #:
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11011038
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Filing Dt:
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12/15/2004
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Publication #:
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Pub Dt:
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06/15/2006
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Title:
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METHOD FOR FABRICATING BOTTOM ELECTRODES OF STACKED CAPACITOR MEMORY CELLS AND METHOD FOR CLEANING AND DRYING A SEMICONDUCTOR WAFER
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Patent #:
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Issue Dt:
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03/28/2006
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Application #:
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11011039
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Filing Dt:
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12/15/2004
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Title:
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METHOD FOR FABRICATING BOTTOM ELECTRODES OF STACKED CAPACITOR MEMORY CELLS
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Patent #:
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Issue Dt:
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01/13/2009
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Application #:
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11011040
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Filing Dt:
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12/15/2004
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Publication #:
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Pub Dt:
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12/14/2006
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Title:
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6F2 ACCESS TRANSISTOR ARRANGEMENT AND SEMICONDUCTOR MEMORY DEVICE
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Patent #:
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Issue Dt:
|
09/04/2007
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Application #:
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11012777
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Filing Dt:
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12/14/2004
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Publication #:
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|
Pub Dt:
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06/15/2006
| | | | |
Title:
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METHOD TO IMPROVE CURRENT AND SLEW RATE RATIO OF OFF-CHIP DRIVERS
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Patent #:
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Issue Dt:
|
01/30/2007
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Application #:
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11013582
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Filing Dt:
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12/16/2004
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Publication #:
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Pub Dt:
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06/22/2006
| | | | |
Title:
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MEMORY CIRCUIT RECEIVERS ACTIVATED BY ENABLE CIRCUIT
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Patent #:
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Issue Dt:
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08/28/2007
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Application #:
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11013870
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Filing Dt:
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12/16/2004
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Publication #:
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Pub Dt:
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06/22/2006
| | | | |
Title:
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MEMORY HAVING TEST CIRCUIT
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Patent #:
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Issue Dt:
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09/18/2007
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Application #:
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11018313
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Filing Dt:
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12/21/2004
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Publication #:
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Pub Dt:
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06/22/2006
| | | | |
Title:
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MEMORY ACCESS USING MULTIPLE ACTIVATED MEMORY CELL ROWS
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Patent #:
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Issue Dt:
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12/12/2006
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Application #:
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11021370
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Filing Dt:
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12/23/2004
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Publication #:
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Pub Dt:
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06/29/2006
| | | | |
Title:
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DELAY LOCKED LOOP USING SYNCHRONOUS MIRROR DELAY
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Patent #:
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Issue Dt:
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10/17/2006
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Application #:
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11022202
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Filing Dt:
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12/22/2004
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Publication #:
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Pub Dt:
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06/22/2006
| | | | |
Title:
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MEMORY HAVING INTERNAL COLUMN COUNTER FOR COMPRESSION TEST MODE
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Patent #:
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Issue Dt:
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09/04/2007
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Application #:
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11024932
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Filing Dt:
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12/30/2004
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Publication #:
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Pub Dt:
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07/06/2006
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Title:
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OPTO-ELECTRONIC MEMORY ELEMENT ON THE BASIS OF ORGANIC METALLOPORPHYRIN MOLECULES
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Patent #:
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Issue Dt:
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08/07/2007
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Application #:
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11025561
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Filing Dt:
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12/29/2004
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Publication #:
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Pub Dt:
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06/29/2006
| | | | |
Title:
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MEMORY WITH SELECTABLE SINGLE CELL OR TWIN CELL CONFIGURATION
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Patent #:
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Issue Dt:
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01/08/2008
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Application #:
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11031716
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Filing Dt:
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01/07/2005
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Publication #:
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Pub Dt:
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07/13/2006
| | | | |
Title:
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HIGH DIELECTRIC CONSTANT MATERIALS
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Patent #:
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Issue Dt:
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06/12/2007
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Application #:
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11032459
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Filing Dt:
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01/10/2005
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Publication #:
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Pub Dt:
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07/13/2006
| | | | |
Title:
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DUTY CYCLE CORRECTOR
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Patent #:
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Issue Dt:
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12/05/2006
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Application #:
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11034006
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Filing Dt:
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01/12/2005
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Publication #:
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Pub Dt:
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07/13/2006
| | | | |
Title:
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DUTY CYCLE DETECTOR WITH FIRST, SECOND, AND THIRD VALUES
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Patent #:
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Issue Dt:
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09/25/2007
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Application #:
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11038465
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Filing Dt:
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01/21/2005
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Publication #:
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Pub Dt:
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07/27/2006
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Title:
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SEMICONDUCTOR DEVICE
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Patent #:
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Issue Dt:
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07/24/2007
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Application #:
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11039665
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Filing Dt:
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01/20/2005
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Publication #:
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Pub Dt:
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07/27/2006
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Title:
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INTERNAL REFERENCE VOLTAGE GENERATION FOR INTEGRATED CIRCUIT TESTING
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Patent #:
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Issue Dt:
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09/18/2007
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Application #:
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11039740
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Filing Dt:
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01/20/2005
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Publication #:
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Pub Dt:
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07/20/2006
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Title:
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STORAGE CAPACITOR AND METHOD OF MANUFACTURING A STORAGE CAPACITOR
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Patent #:
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Issue Dt:
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04/11/2006
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Application #:
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11040176
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Filing Dt:
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01/21/2005
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Title:
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SEMICONDUCTOR DEVICE AND A METHOD FOR FABRICATING A SEMICONDUCTOR DEVICE
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Patent #:
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Issue Dt:
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07/15/2008
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Application #:
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11040630
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Filing Dt:
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01/21/2005
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Publication #:
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Pub Dt:
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07/27/2006
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Title:
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INTEGRATED CIRCUIT INCLUDING A MEMORY HAVING LOW INITIAL LATENCY
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Patent #:
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Issue Dt:
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04/24/2007
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Application #:
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11043950
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Filing Dt:
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01/28/2005
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Publication #:
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Pub Dt:
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08/03/2006
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Title:
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METHOD OF TREATING A STRUCTURED SURFACE
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Patent #:
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Issue Dt:
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11/01/2011
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Application #:
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11044721
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Filing Dt:
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01/28/2005
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Publication #:
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Pub Dt:
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08/03/2006
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Title:
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METHOD FOR PRODUCING A DIELECTRIC MATERIAL ON A SEMICONDUCTOR DEVICE AND SEMICONDUCTOR DEVICE
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Patent #:
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Issue Dt:
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01/30/2007
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Application #:
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11046065
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Filing Dt:
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01/28/2005
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Publication #:
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Pub Dt:
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08/03/2006
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Title:
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TEST DATA TOPOLOGY WRITE TO MEMORY USING LATCHED SENSE AMPLIFIER DATA AND ROW ADDRESS SCRAMBLING
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Patent #:
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Issue Dt:
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05/08/2007
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Application #:
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11046160
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Filing Dt:
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01/28/2005
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Publication #:
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Pub Dt:
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08/17/2006
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Title:
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MEMORY DEVICE HAVING COMPONENTS FOR TRANSMITTING AND RECEIVING SIGNALS SYNCHRONOUSLY
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Patent #:
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Issue Dt:
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05/22/2007
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Application #:
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11048185
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Filing Dt:
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02/01/2005
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Publication #:
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Pub Dt:
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08/03/2006
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Title:
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DUTY CYCLE CORRECTOR
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Patent #:
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Issue Dt:
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07/18/2006
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Application #:
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11049857
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Filing Dt:
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02/04/2005
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Publication #:
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Pub Dt:
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08/10/2006
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Title:
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METHODS AND APPARATUS FOR IMPLEMENTING A POWER DOWN IN A MEMORY DEVICE
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Patent #:
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Issue Dt:
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04/29/2008
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Application #:
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11051257
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Filing Dt:
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02/04/2005
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Publication #:
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Pub Dt:
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08/10/2006
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Title:
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METHOD FOR INTERCONNECTING SEMICONDUCTOR COMPONENTS WITH SUBSTRATES AND CONTACT MEANS
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Patent #:
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Issue Dt:
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12/02/2008
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Application #:
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11051969
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Filing Dt:
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02/04/2005
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Publication #:
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Pub Dt:
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08/10/2006
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Title:
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DISSOCIATED FABRICATION OF PACKAGES AND CHIPS OF INTEGRATED CIRCUITS
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Patent #:
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Issue Dt:
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04/22/2008
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Application #:
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11054853
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Filing Dt:
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02/10/2005
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Publication #:
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Pub Dt:
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08/10/2006
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Title:
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INTEGRATED CIRCUIT HAVING A MEMORY INCLUDING A LOW-K DIELECTRIC MATERIAL FOR THERMAL ISOLATION
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Patent #:
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Issue Dt:
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10/23/2007
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Application #:
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11058723
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Filing Dt:
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02/15/2005
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Publication #:
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Pub Dt:
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08/17/2006
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Title:
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ENHANCED MEGASONIC BASED CLEAN USING AN ALTERNATIVE CLEANING CHEMISTRY
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Patent #:
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Issue Dt:
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08/21/2007
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Application #:
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11060737
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Filing Dt:
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02/18/2005
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Publication #:
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Pub Dt:
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08/24/2006
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Title:
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METHOD AND APPARATUS FOR SEMICONDUCTOR TESTING UTILIZING DIES WITH INTEGRATED CIRCUIT
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Patent #:
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Issue Dt:
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07/24/2007
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Application #:
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11065196
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Filing Dt:
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02/24/2005
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Publication #:
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Pub Dt:
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08/24/2006
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Title:
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RANDOM ACCESS MEMORY INCLUDING SELECTIVE ACTIVATION OF SELECT LINE
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Patent #:
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Issue Dt:
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03/07/2006
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Application #:
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11066320
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Filing Dt:
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02/25/2005
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Title:
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METHOD AND SYSTEM FOR FABRICATING FREE-STANDING NANOSTRUCTURES
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Patent #:
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Issue Dt:
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11/06/2007
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Application #:
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11066555
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Filing Dt:
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02/28/2005
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Publication #:
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Pub Dt:
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08/31/2006
| | | | |
Title:
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CHIP STACK EMPLOYING A FLEX CIRCUIT
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Patent #:
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Issue Dt:
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07/24/2007
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Application #:
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11067191
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Filing Dt:
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02/25/2005
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Publication #:
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Pub Dt:
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08/31/2006
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Title:
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OPTIMIZING LIGHT PATH UNIFORMITY IN INSPECTION SYSTEMS
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Patent #:
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Issue Dt:
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04/29/2008
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Application #:
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11067983
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Filing Dt:
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02/28/2005
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Publication #:
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Pub Dt:
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08/31/2006
| | | | |
Title:
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SEMICONDUCTOR MEMORY HAVING CHARGE TRAPPING MEMORY CELLS AND FABRICATION METHOD THEREOF
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Patent #:
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Issue Dt:
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04/24/2007
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Application #:
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11068582
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Filing Dt:
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02/28/2005
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Publication #:
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Pub Dt:
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08/31/2006
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Title:
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DATA STROBE SYNCHRONIZATION FOR DRAM DEVICES
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Patent #:
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Issue Dt:
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05/29/2007
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Application #:
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11073523
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Filing Dt:
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03/08/2005
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Publication #:
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Pub Dt:
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09/14/2006
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Title:
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MEMORY DEVICE HAVING OFF-CHIP DRIVER ENABLE CIRCUIT AND METHOD FOR REDUCING DELAYS DURING READ OPERATIONS
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Patent #:
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Issue Dt:
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07/29/2008
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Application #:
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11078647
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Filing Dt:
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03/11/2005
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Publication #:
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Pub Dt:
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09/14/2006
| | | | |
Title:
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SEMICONDUCTOR MEMORY
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Patent #:
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Issue Dt:
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09/18/2007
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Application #:
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11079620
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Filing Dt:
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03/14/2005
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Publication #:
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Pub Dt:
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09/14/2006
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Title:
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METHOD FOR PRODUCING CHIP STACKS AND CHIP STACKS FORMED BY INTEGRATED DEVICES
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Patent #:
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Issue Dt:
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10/10/2006
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Application #:
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11079726
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Filing Dt:
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03/14/2005
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Publication #:
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Pub Dt:
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09/14/2006
| | | | |
Title:
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MEMORY WITH DATA LATCHING CIRCUIT INCLUDING A SELECTOR
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Patent #:
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Issue Dt:
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08/05/2008
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Application #:
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11079889
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Filing Dt:
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03/14/2005
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Publication #:
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Pub Dt:
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09/21/2006
| | | | |
Title:
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INTEGRATED CIRCUIT WITH A CONTROL INPUT THAT CAN BE DISABLED
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Patent #:
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Issue Dt:
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08/12/2008
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Application #:
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11081086
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Filing Dt:
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03/15/2005
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Publication #:
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Pub Dt:
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09/21/2006
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Title:
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NON-VOLATILE MEMORY CARD WITH AUTARKIC CHRONOMETER
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Patent #:
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Issue Dt:
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02/19/2008
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Application #:
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11084728
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Filing Dt:
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03/18/2005
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Publication #:
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Pub Dt:
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09/21/2006
| | | | |
Title:
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METHOD FOR FABRICATING A SEMICONDUCTOR DEVICE
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Patent #:
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Issue Dt:
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01/30/2007
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Application #:
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11089860
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Filing Dt:
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03/25/2005
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Publication #:
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Pub Dt:
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09/28/2006
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Title:
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POWER SAVING REFRESH SCHEME FOR DRAMS WITH SEGMENTED WORD LINE ARCHITECTURE
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Patent #:
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Issue Dt:
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02/05/2008
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Application #:
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11098780
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Filing Dt:
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04/04/2005
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Publication #:
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Pub Dt:
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10/05/2006
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Title:
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STACKED DIE PACKAGE
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Patent #:
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Issue Dt:
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01/30/2007
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Application #:
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11098998
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Filing Dt:
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04/05/2005
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Publication #:
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Pub Dt:
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10/05/2006
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Title:
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TEST MODE FOR DETECTING A FLOATING WORD LINE
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Patent #:
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Issue Dt:
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05/08/2007
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Application #:
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11101972
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Filing Dt:
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04/08/2005
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Publication #:
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Pub Dt:
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08/10/2006
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Title:
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PHASE CHANGE MEMORY CELL WITH HIGH READ MARGIN AT LOW POWER OPERATION
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Patent #:
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Issue Dt:
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08/14/2007
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11103244
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04/11/2005
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Pub Dt:
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10/12/2006
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Title:
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METHOD OF MANUFACTURING A MEMORY DEVICE
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Patent #:
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Issue Dt:
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12/23/2008
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11111140
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04/21/2005
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Pub Dt:
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10/26/2006
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Title:
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CIRCUIT INCLUDING A DESKEW CIRCUIT FOR ASYMMETRICALLY DELAYING RISING AND FALLING EDGES
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Patent #:
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Issue Dt:
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10/23/2007
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11116439
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04/28/2005
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Pub Dt:
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11/02/2006
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Title:
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EXPOSING A SEMICONDUCTOR WAFER USING TWO DIFFERENT SPECTRAL WAVELENGTHS AND ADJUSTING FOR CHROMATIC ABERRATION
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04/17/2007
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11116456
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04/28/2005
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Pub Dt:
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11/02/2006
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Title:
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METHODS AND APPARATUS FOR IMPLEMENTING STANDBY MODE IN A RANDOM ACCESS MEMORY
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Issue Dt:
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09/18/2007
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11119376
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04/29/2005
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Pub Dt:
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11/02/2006
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Title:
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MULTI-BIT VIRTUAL-GROUND NAND MEMORY DEVICE
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Issue Dt:
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08/05/2008
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Application #:
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11120007
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05/02/2005
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Publication #:
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Pub Dt:
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11/02/2006
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Title:
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MEMORY DEVICE
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Patent #:
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Issue Dt:
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01/30/2007
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11121171
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05/04/2005
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Publication #:
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Pub Dt:
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11/09/2006
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Title:
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INTEGRATED SEMICONDUCTOR MEMORY DEVICE FOR SYNCHRONIZING A SIGNAL WITH A CLOCK SIGNAL
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Patent #:
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Issue Dt:
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10/27/2009
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Application #:
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11126684
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05/11/2005
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Publication #:
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Pub Dt:
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11/16/2006
| | | | |
Title:
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TECHNIQUE TO READ SPECIAL MODE REGISTER
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