Patent Assignment Details
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For pending or abandoned applications please consult USPTO staff.
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| Reel/Frame: | 019233/0931 | |
| Pages: | 5 |
| | Recorded: | 05/01/2007 | | |
| Attorney Dkt #: | MI22-3532 |
| Conveyance: | ASSIGNMENT OF ASSIGNORS INTEREST (SEE DOCUMENT FOR DETAILS). |
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Total properties:
1
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Patent #:
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Issue Dt:
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07/16/2013
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Application #:
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11743075
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Filing Dt:
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05/01/2007
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Publication #:
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Pub Dt:
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11/06/2008
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Title:
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SEMICONDUCTOR CONSTRUCTIONS COMPRISING VERTICALLY-STACKED MEMORY UNITS THAT INCLUDE DIODES UTILIZING AT LEAST TWO DIFFERENT DIELECTRIC MATERIALS, AND ELECTRONIC SYSTEMS
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Assignee
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| 8000 SOUTH FEDERAL WAY |
| BOISE, IDAHO 83716 |
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Correspondence name and address
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DAVID G. LATWESEN, PH.D.
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601 W. 1ST AVENUE, SUITE 1300
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SPOKANE, WA 99201-3424
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