Patent Assignment Details
NOTE:Results display only for issued patents and published applications.
For pending or abandoned applications please consult USPTO staff.
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| Reel/Frame: | 048080/0935 | |
| Pages: | 3 |
| | Recorded: | 01/22/2019 | | |
| Attorney Dkt #: | 252210-9010 |
| Conveyance: | ASSIGNMENT OF ASSIGNORS INTEREST (SEE DOCUMENT FOR DETAILS). |
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Total properties:
5
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Patent #:
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Issue Dt:
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02/10/2009
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Application #:
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11162153
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Filing Dt:
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08/30/2005
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Publication #:
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Pub Dt:
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06/08/2006
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Title:
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PCI EXPRESS PHYSICAL LAYER BUILT-IN SELF TEST ARCHITECTURE
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Patent #:
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Issue Dt:
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11/01/2011
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Application #:
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12346800
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Filing Dt:
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12/30/2008
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Publication #:
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Pub Dt:
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05/07/2009
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Title:
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SERIAL INTERFACE DEVICE BUILT-IN SELF TEST
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Patent #:
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Issue Dt:
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01/01/2013
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Application #:
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12469792
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Filing Dt:
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05/21/2009
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Publication #:
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Pub Dt:
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09/16/2010
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Title:
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INTEGRATED CIRCUITS FOR ACCESSING USB DEVICE VIA USB 3.0 RECEPTACLE
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Patent #:
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Issue Dt:
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07/31/2012
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Application #:
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13110235
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Filing Dt:
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05/18/2011
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Publication #:
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Pub Dt:
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09/15/2011
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Title:
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SERIAL INTERFACE DEVICE BUILT-IN SELF TEST
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Patent #:
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Issue Dt:
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10/08/2013
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Application #:
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13666435
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Filing Dt:
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11/01/2012
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Publication #:
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Pub Dt:
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03/07/2013
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Title:
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INTEGRATED CIRCUITS FOR ACCESSING USB DEVICE
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Assignee
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| 7F, 529-1, ZHONGZHENG RD., XINDIAN DIST. |
| NEW TAIPEI CITY, TAIWAN 231 |
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Correspondence name and address
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MCCLURE, QUALEY & RODACK, LLP
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280 INTERSTATE NORTH CIRCLE SE
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SUITE 550
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ATLANTA, GA 30339
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