Patent Assignment Details
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Reel/Frame: | 008879/0949 | |
| Pages: | 4 |
| | Recorded: | 11/04/1997 | | |
Conveyance: | ASSIGNMENT OF ASSIGNORS INTEREST (SEE DOCUMENT FOR DETAILS). |
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Total properties:
1
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Patent #:
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Issue Dt:
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06/08/1999
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Application #:
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08964236
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Filing Dt:
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11/04/1997
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Title:
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SEMICONDUCTOR INTEGRATED CIRCUIT DEVICE COMPRISING SYNCHRONOUS DRAM CORE AND LOGIC CIRCUIT INTEGRATED INTO A SINGLE CHIP AND METHOD OF TESTING THE SYNCHRONOUS DRAM CORE
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Assignee
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2-3, MARUNOUCHI 2-CHOME, CHIYODA-KU |
TOKYO 100, JAPAN |
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Correspondence name and address
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LEYDIG, VOIT & MAYER
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JEFFREY A. WYAND
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SUITE 300
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700 THIRTEENTH ST., N.W.
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WASHINGTON, DC 20005
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