Total properties:
70
|
|
Patent #:
|
|
Issue Dt:
|
09/05/1995
|
Application #:
|
07783737
|
Filing Dt:
|
10/28/1991
|
Title:
|
LEAD-ON-CHIP INTEGRATED CIRCUIT APPARATUS
|
|
|
Patent #:
|
|
Issue Dt:
|
08/17/1993
|
Application #:
|
07903056
|
Filing Dt:
|
06/22/1992
|
Title:
|
IMPACT SOLDER METHOD AND APPARATUS
|
|
|
Patent #:
|
|
Issue Dt:
|
01/16/1996
|
Application #:
|
07990334
|
Filing Dt:
|
12/11/1992
|
Title:
|
HIGH DENSITY LEAD-ON-PACKAGE FABRICATION METHOD AND APPARATUS
|
|
|
Patent #:
|
|
Issue Dt:
|
11/29/1994
|
Application #:
|
08037830
|
Filing Dt:
|
03/29/1993
|
Title:
|
WARP-RESISTENT ULTRA-THIN INTEGRATED CIRCUIT PACKAGE FABRICATION METHOD
|
|
|
Patent #:
|
|
Issue Dt:
|
11/29/1994
|
Application #:
|
08043196
|
Filing Dt:
|
04/05/1993
|
Title:
|
ULTRA HIGH DENSITY INTEGRATED CIRCUIT PACKAGES METHOD
|
|
|
Patent #:
|
|
Issue Dt:
|
08/29/1995
|
Application #:
|
08133395
|
Filing Dt:
|
10/08/1993
|
Title:
|
ULTRA HIGH DENSITY INTEGRATED CIRCUIT PACKAGES METHOD AND APPARATUS
|
|
|
Patent #:
|
|
Issue Dt:
|
05/30/1995
|
Application #:
|
08133397
|
Filing Dt:
|
10/08/1993
|
Title:
|
ULTRA HIGH DENSITY MODULAR INTEGRATED CIRCUIT PACKAGE
|
|
|
Patent #:
|
|
Issue Dt:
|
03/12/1996
|
Application #:
|
08153511
|
Filing Dt:
|
11/17/1993
|
Title:
|
CAPACITIVE COUPLING CONFIGURATION FOR AN INTEGRATED CIRCUIT PACKAGE
|
|
|
Patent #:
|
|
Issue Dt:
|
12/27/1994
|
Application #:
|
08168354
|
Filing Dt:
|
12/17/1993
|
Title:
|
ULTRA HIGH DENSITY INTEGRATED CIRCUIT PACKAGES METHOD AND APPARATUS
|
|
|
Patent #:
|
|
Issue Dt:
|
11/29/1994
|
Application #:
|
08206301
|
Filing Dt:
|
03/04/1994
|
Title:
|
WARP-RESISTENT ULTRA-THIN INTEGRATED CIRCUIT PACKAGE FABRICATION METHOD
|
|
|
Patent #:
|
|
Issue Dt:
|
12/19/1995
|
Application #:
|
08206311
|
Filing Dt:
|
03/04/1994
|
Title:
|
METHOD OF ASSEMBLING ULTRA HIGH DENSITY INTEGRATED CIRCUIT PACKAGES
|
|
|
Patent #:
|
|
Issue Dt:
|
10/03/1995
|
Application #:
|
08206829
|
Filing Dt:
|
03/07/1994
|
Title:
|
BUS COMMUNICATION SYSTEM FOR STACKED HIGH DENSITY INTEGRATED CIRCUIT PACKAGES
|
|
|
Patent #:
|
|
Issue Dt:
|
12/03/1996
|
Application #:
|
08280968
|
Filing Dt:
|
07/27/1994
|
Title:
|
WARP-RESISTANT ULTRA-THIN INTEGRATED CIRCUIT PACKAGE
|
|
|
Patent #:
|
|
Issue Dt:
|
10/01/1996
|
Application #:
|
08289468
|
Filing Dt:
|
08/12/1994
|
Title:
|
MULTI-SIGNAL RAIL ASSEMBLY WITH IMPEDANCE CONTROL FOR A THREE-DIMENSIONAL HIGH DENSITY INTEGRATED CIRCUIT PACKAGE
|
|
|
Patent #:
|
|
Issue Dt:
|
10/15/1996
|
Application #:
|
08298544
|
Filing Dt:
|
08/30/1994
|
Title:
|
ULTRA HIGH DENSITY INTEGRATED CIRCUIT PACKAGES METHOD AND APPARATUS
|
|
|
Patent #:
|
|
Issue Dt:
|
12/30/1997
|
Application #:
|
08325719
|
Filing Dt:
|
10/19/1994
|
Title:
|
HERMETICALLY SEALED CERAMIC INTEGRATED CIRCUIT HEAT DISSIPATING PACKAGE FABRICATION METHOD
|
|
|
Patent #:
|
|
Issue Dt:
|
11/05/1996
|
Application #:
|
08328338
|
Filing Dt:
|
10/24/1994
|
Title:
|
HERMETICALLY SEALED CERAMIC INTEGRATED CIRCUIT HEAT DISSIPATING PACKAGE
|
|
|
Patent #:
|
|
Issue Dt:
|
08/06/1996
|
Application #:
|
08375747
|
Filing Dt:
|
01/20/1995
|
Title:
|
ULTRA HIGH DENSITY INTEGRATED CIRCUIT PACKAGE
|
|
|
Patent #:
|
|
Issue Dt:
|
06/18/1996
|
Application #:
|
08375874
|
Filing Dt:
|
01/20/1995
|
Title:
|
LEAD-ON-CHIP INTEGRATED CIRCUIT APPARATUS
|
|
|
Patent #:
|
|
Issue Dt:
|
01/07/1997
|
Application #:
|
08377578
|
Filing Dt:
|
01/24/1995
|
Title:
|
HIGH DENSITY INTEGRATED CIRCUIT MODULE WITH COMPLEX ELECTRICAL INTERCONNECT RAILS
|
|
|
Patent #:
|
|
Issue Dt:
|
09/08/1998
|
Application #:
|
08380541
|
Filing Dt:
|
01/30/1995
|
Title:
|
HERMETICALLY SEALED INTEGRATED CIRCUIT LEAD-ON PACKAGE CONFIGURATION
|
|
|
Patent #:
|
|
Issue Dt:
|
03/12/1996
|
Application #:
|
08380543
|
Filing Dt:
|
01/30/1995
|
Title:
|
HIGH DENSITY INTEGRATED CIRCUIT MODULE WITH SNAP-ON RAIL ASSEMBLIES
|
|
|
Patent #:
|
|
Issue Dt:
|
08/27/1996
|
Application #:
|
08436902
|
Filing Dt:
|
05/08/1995
|
Title:
|
ULTRA HIGH DENSITY INTEGRATED CIRCUIT PACKAGES
|
|
|
Patent #:
|
|
Issue Dt:
|
12/26/1995
|
Application #:
|
08440500
|
Filing Dt:
|
05/12/1995
|
Title:
|
BUS COMMUNICATION SYSTEM FOR STACKED HIGH DENSITY INTEGRATED CIRCUIT PACKAGES WITH TRIFURCATED DISTAL LEAD ENDS
|
|
|
Patent #:
|
|
Issue Dt:
|
02/20/1996
|
Application #:
|
08445848
|
Filing Dt:
|
05/22/1995
|
Title:
|
BUS COMMUNICATION SYSTEM FOR STACKED HIGH DENSITY INTEGRATED CIRCUIT PACKAGES WITH BIFURCATED DISTAL LEAD ENDS
|
|
|
Patent #:
|
|
Issue Dt:
|
02/25/1997
|
Application #:
|
08445895
|
Filing Dt:
|
05/22/1995
|
Title:
|
METHOD OF MANUFACTURING A BUS COMMUNICATION SYSTEM FOR STACKED HIGH DENSITY INTEGRATED CIRCUIT PACKAGES
|
|
|
Patent #:
|
|
Issue Dt:
|
07/01/1997
|
Application #:
|
08473593
|
Filing Dt:
|
06/07/1995
|
Title:
|
ULTRA-HIGH DENSITY WARP-RESISTANT MEMORY MODULE
|
|
|
Patent #:
|
|
Issue Dt:
|
05/20/1997
|
Application #:
|
08497565
|
Filing Dt:
|
06/30/1995
|
Title:
|
HIGH DENSITY LEAD-ON-PACKAGE FABRICATION METHOD AND APPARATUS
|
|
|
Patent #:
|
|
Issue Dt:
|
09/03/1996
|
Application #:
|
08506309
|
Filing Dt:
|
07/24/1995
|
Title:
|
BUS COMMUNICATION SYSTEM FOR STACKED HIGH DENSITY INTEGRATED CIRCUIT PACKAGES
|
|
|
Patent #:
|
|
Issue Dt:
|
06/15/1999
|
Application #:
|
08510729
|
Filing Dt:
|
11/20/1995
|
Title:
|
SIMULCAST STANDARD MULTICHIP MEMORY ADDRESSING SYSTEM
|
|
|
Patent #:
|
|
Issue Dt:
|
09/01/1998
|
Application #:
|
08514294
|
Filing Dt:
|
08/11/1995
|
Title:
|
THREE-DIMENSIONAL WARP-RESISTANT INTEGRATED CIRCUIT MODULE METHOD AND APPARATUS
|
|
|
Patent #:
|
|
Issue Dt:
|
08/05/1997
|
Application #:
|
08516848
|
Filing Dt:
|
08/18/1995
|
Title:
|
LEAD-ON-CHIP INTEGRATED CIRCUIT APPARATUS
|
|
|
Patent #:
|
|
Issue Dt:
|
04/01/1997
|
Application #:
|
08517485
|
Filing Dt:
|
08/21/1995
|
Title:
|
METHOD OF MANUFACTURING AN INTEGRATED PACKAGE HAVING A PAIR OF DIE ON A COMMON LEAD FRAME
|
|
|
Patent #:
|
|
Issue Dt:
|
12/31/1996
|
Application #:
|
08523201
|
Filing Dt:
|
09/05/1995
|
Title:
|
METHOD OF MANUFACTURING A HIGH DENSITY INTEGRATED CIRCUIT MODULE HAVING COMPLEX ELECTRICAL INTERCONNECT RAILS
|
|
|
Patent #:
|
|
Issue Dt:
|
07/30/1996
|
Application #:
|
08526470
|
Filing Dt:
|
09/11/1995
|
Title:
|
BUS COMMUNICATION SYSTEM FOR STACKED HIGH DENSITY INTEGRATED CIRCUIT PACKAGES HAVING AN INTERMEDIATE LEAD FRAME
|
|
|
Patent #:
|
|
Issue Dt:
|
12/17/1996
|
Application #:
|
08601880
|
Filing Dt:
|
02/15/1996
|
Title:
|
INTEGRATED CIRCUIT PACKAGE WITH OVERLAPPED DIE ON A COMMON LEAD FRAME
|
|
|
Patent #:
|
|
Issue Dt:
|
12/17/1996
|
Application #:
|
08630083
|
Filing Dt:
|
04/09/1996
|
Title:
|
BUS COMMUNICATION SYSTEM FOR STACKED HIGH DENSITY INTEGRATED CIRCUIT PACKAGES
|
|
|
Patent #:
|
|
Issue Dt:
|
01/26/1999
|
Application #:
|
08644491
|
Filing Dt:
|
05/10/1996
|
Title:
|
WARP-RESISTENT ULTRA-THIN INTEGRATED CIRCUIT PACKAGE FABRICATION METHOD
|
|
|
Patent #:
|
|
Issue Dt:
|
11/02/1999
|
Application #:
|
08645319
|
Filing Dt:
|
05/13/1996
|
Title:
|
INTEGRATED CIRCUIT PACKAGES HAVING AN EXTERNALLY MOUNTED LEAD FRAME HAVING BIFURCATED DISTAL LEAD ENDS
|
|
|
Patent #:
|
|
Issue Dt:
|
07/14/1998
|
Application #:
|
08650721
|
Filing Dt:
|
05/20/1996
|
Title:
|
METHOD OF MANUFACTURING A HIGH DENSITY INTEGRATED CIRCUIT MODULE WITH COMPLEX ELECTRICAL INTERCONNECT RAILS HAVING ELECTRICAL INTERCONNECT STRAIN RELIEF
|
|
|
Patent #:
|
|
Issue Dt:
|
12/01/1998
|
Application #:
|
08686985
|
Filing Dt:
|
07/25/1996
|
Title:
|
METHOD OF MANUFACTURING AN UKTRA-HIGH DENSITY WARP-RESISTANT MEMORY MODULE
|
|
|
Patent #:
|
|
Issue Dt:
|
10/27/1998
|
Application #:
|
08758839
|
Filing Dt:
|
12/02/1996
|
Title:
|
ULTRA-HIGH DENSITY WARP-RESISTANT MEMORY MODULE
|
|
|
Patent #:
|
|
Issue Dt:
|
07/21/1998
|
Application #:
|
08798556
|
Filing Dt:
|
02/11/1997
|
Title:
|
METHOD OF FORMING A HERMETICALLY SEALED CIRCUIT LEAD-ON PACKAGE
|
|
|
Patent #:
|
|
Issue Dt:
|
08/31/1999
|
Application #:
|
08815537
|
Filing Dt:
|
03/12/1997
|
Title:
|
APPARATUS AND METHOD OF MANUFACTURING A WARP RESISTANT THERMALLY CONDUCTIVE INTEGRATED CIRCUIT PACKAGE
|
|
|
Patent #:
|
|
Issue Dt:
|
04/20/1999
|
Application #:
|
08888850
|
Filing Dt:
|
07/07/1997
|
Title:
|
THREE-DIMENSIONAL WARP-RESISTANT INTEGRATED CIRCUIT MODULE METHOD AND APPARATUS
|
|
|
Patent #:
|
|
Issue Dt:
|
04/11/2000
|
Application #:
|
08935380
|
Filing Dt:
|
09/22/1997
|
Title:
|
ULTRA HIGH DENSITY INTEGRATED CIRCUIT PACKAGES
|
|
|
Patent #:
|
|
Issue Dt:
|
02/15/2000
|
Application #:
|
08937200
|
Filing Dt:
|
09/22/1997
|
Title:
|
ULTRA HIGH DENSITY INTEGRATED CIRCUIT PACKAGES
|
|
|
Patent #:
|
|
Issue Dt:
|
10/05/1999
|
Application #:
|
09021744
|
Filing Dt:
|
02/11/1998
|
Title:
|
METHOD OF MAKING HIGH DENSITY CIRCUIT MODULE
|
|
|
Patent #:
|
|
Issue Dt:
|
02/20/2001
|
Application #:
|
09115293
|
Filing Dt:
|
07/14/1998
|
Title:
|
METHOD OF MANUFACTURING A WARP RESISTANT THERMALLY CONDUCTIVE CIRCUIT PACKAGE
|
|
|
Patent #:
|
|
Issue Dt:
|
08/28/2001
|
Application #:
|
09133297
|
Filing Dt:
|
08/12/1998
|
Title:
|
CLOCK DRIVER WITH INSTANTANEOUSLY SELECTABLE PHASE AND METHOD FOR USE IN DATA COMMUNICATION SYSTEM
|
|
|
Patent #:
|
|
Issue Dt:
|
02/27/2001
|
Application #:
|
09159120
|
Filing Dt:
|
09/23/1998
|
Title:
|
WARP-RESISTENT ULTRA-THIN INTEGRATED CIRCUIT PACKAGE FABRICATION METHOD
|
|
|
Patent #:
|
|
Issue Dt:
|
10/30/2001
|
Application #:
|
09221350
|
Filing Dt:
|
12/28/1998
|
Title:
|
STACKED MICRO BALL GRID ARRAY PACKAGES
|
|
|
Patent #:
|
|
Issue Dt:
|
03/27/2001
|
Application #:
|
09222263
|
Filing Dt:
|
12/28/1998
|
Title:
|
METHOD OF MANUFACTURING A SURFACE MOUNT PACKAGE
|
|
|
Patent #:
|
|
Issue Dt:
|
09/11/2001
|
Application #:
|
09343432
|
Filing Dt:
|
06/30/1999
|
Title:
|
HIGH DENSITY INTEGRATED CIRCUIT MODULE WITH COMPLEX ELECTRICAL INTERCONNECT RAILS HAVING ELECTRICAL INTERCONNECT STRAIN RELIEF
|
|
|
Patent #:
|
|
Issue Dt:
|
01/02/2001
|
Application #:
|
09434534
|
Filing Dt:
|
11/05/1999
|
Title:
|
ULTRA HIGH DENSITY INTEGRATED CIRCUIT PACKAGES
|
|
|
Patent #:
|
|
Issue Dt:
|
06/11/2002
|
Application #:
|
09646724
|
Filing Dt:
|
03/07/2001
|
Title:
|
RAMBUS STAKPAK
|
|
|
Patent #:
|
|
Issue Dt:
|
08/19/2003
|
Application #:
|
09663753
|
Filing Dt:
|
09/15/2000
|
Title:
|
STACKING SYSTEM AND METHOD
|
|
|
Patent #:
|
|
Issue Dt:
|
07/19/2005
|
Application #:
|
09761210
|
Filing Dt:
|
01/16/2001
|
Publication #:
|
|
Pub Dt:
|
06/28/2001
| | | | |
Title:
|
HIGH DENSITY INTEGRATED CIRCUIT MODULE
|
|
|
Patent #:
|
|
Issue Dt:
|
10/08/2002
|
Application #:
|
09819171
|
Filing Dt:
|
03/27/2001
|
Publication #:
|
|
Pub Dt:
|
10/03/2002
| | | | |
Title:
|
CONTACT MEMBER STACKING SYSTEM AND METHOD
|
|
|
Patent #:
|
|
Issue Dt:
|
09/09/2003
|
Application #:
|
09916625
|
Filing Dt:
|
07/27/2001
|
Title:
|
WIDE DATA PATH STACKING SYSTEM AND METHOD
|
|
|
Patent #:
|
|
Issue Dt:
|
06/10/2003
|
Application #:
|
10005581
|
Filing Dt:
|
10/26/2001
|
Title:
|
CHIP SCALE STACKING SYSTEM AND METHOD
|
|
|
Patent #:
|
|
Issue Dt:
|
10/19/2004
|
Application #:
|
10092104
|
Filing Dt:
|
03/06/2002
|
Publication #:
|
|
Pub Dt:
|
10/03/2002
| | | | |
Title:
|
CONTACT MEMBER STACKING SYSTEM AND METHOD
|
|
|
Patent #:
|
|
Issue Dt:
|
06/03/2003
|
Application #:
|
10101039
|
Filing Dt:
|
03/19/2002
|
Publication #:
|
|
Pub Dt:
|
08/01/2002
| | | | |
Title:
|
FLEXIBLE CIRCUIT CONNECTOR FOR STACKED CHIP MODULE
|
|
|
Patent #:
|
|
Issue Dt:
|
09/06/2005
|
Application #:
|
10136890
|
Filing Dt:
|
05/02/2002
|
Publication #:
|
|
Pub Dt:
|
05/01/2003
| | | | |
Title:
|
INTEGRATED CIRCUIT STACKING SYSTEM AND METHOD
|
|
|
Patent #:
|
NONE
|
Issue Dt:
|
|
Application #:
|
10400309
|
Filing Dt:
|
03/27/2003
|
Publication #:
|
|
Pub Dt:
|
07/24/2003
| | | | |
Title:
|
Stacking system and method
|
|
|
Patent #:
|
|
Issue Dt:
|
02/03/2009
|
Application #:
|
10435192
|
Filing Dt:
|
05/09/2003
|
Publication #:
|
|
Pub Dt:
|
01/01/2004
| | | | |
Title:
|
MODULARIZED DIE STACKING SYSTEM AND METHOD
|
|
|
Patent #:
|
|
Issue Dt:
|
06/27/2006
|
Application #:
|
10449242
|
Filing Dt:
|
05/30/2003
|
Publication #:
|
|
Pub Dt:
|
10/30/2003
| | | | |
Title:
|
FLEXIBLE CIRCUIT CONNECTOR FOR STACKED CHIP MODULE
|
|
|
Patent #:
|
|
Issue Dt:
|
07/05/2005
|
Application #:
|
10453398
|
Filing Dt:
|
06/03/2003
|
Publication #:
|
|
Pub Dt:
|
01/01/2004
| | | | |
Title:
|
MEMORY EXPANSION AND CHIP SCALE STACKING SYSTEM AND METHOD
|
|
|
Patent #:
|
NONE
|
Issue Dt:
|
|
Application #:
|
10457608
|
Filing Dt:
|
06/09/2003
|
Publication #:
|
|
Pub Dt:
|
12/25/2003
| | | | |
Title:
|
Low profile stacking system and method
|
|
|
Patent #:
|
|
Issue Dt:
|
04/11/2006
|
Application #:
|
10631886
|
Filing Dt:
|
07/11/2003
|
Publication #:
|
|
Pub Dt:
|
03/18/2004
| | | | |
Title:
|
LOW PROFILE CHIP SCALE STACKING SYSTEM AND METHOD
|
|