Patent Assignment Details
NOTE:Results display only for issued patents and published applications.
For pending or abandoned applications please consult USPTO staff.
|
Reel/Frame: | 029569/0958 | |
| Pages: | 3 |
| | Recorded: | 01/04/2013 | | |
Attorney Dkt #: | 139812.00002 |
Conveyance: | ASSIGNMENT OF ASSIGNORS INTEREST (SEE DOCUMENT FOR DETAILS). |
|
Total properties:
5
|
|
Patent #:
|
|
Issue Dt:
|
09/04/2012
|
Application #:
|
12563076
|
Filing Dt:
|
09/18/2009
|
Publication #:
|
|
Pub Dt:
|
01/14/2010
| | | | |
Title:
|
SEMICONDUCTOR DEVICE WITH LINEARLY RESTRICTED GATE LEVEL REGION INCLUDING TWO TRANSISTORS OF FIRST TYPE AND TWO TRANSISTORS OF SECOND TYPE WITH OFFSET GATE CONTACTS
|
|
|
Patent #:
|
|
Issue Dt:
|
07/10/2012
|
Application #:
|
12571351
|
Filing Dt:
|
09/30/2009
|
Publication #:
|
|
Pub Dt:
|
01/28/2010
| | | | |
Title:
|
INTEGRATED CIRCUIT INCLUDING GATE ELECTRODE LEVEL REGION INCLUDING AT LEAST THREE LINEAR-SHAPED CONDUCTIVE STRUCTURES OF EQUAL LENGTH HAVING ALIGNED ENDS AND POSITIONED AT EQUAL PITCH AND FORMING MULTIPLE GATE ELECTRODES OF TRANSISTORS OF DIFFERENT TYPE
|
|
|
Patent #:
|
|
Issue Dt:
|
09/04/2012
|
Application #:
|
12572055
|
Filing Dt:
|
10/01/2009
|
Publication #:
|
|
Pub Dt:
|
01/28/2010
| | | | |
Title:
|
Semiconductor device including two transistors of first type having gates formed by conductors of different length respectively aligned with two transistors of second type having gates formed by conductors of different length
|
|
|
Patent #:
|
|
Issue Dt:
|
09/04/2012
|
Application #:
|
12572068
|
Filing Dt:
|
10/01/2009
|
Publication #:
|
|
Pub Dt:
|
01/28/2010
| | | | |
Title:
|
SEMICONDUCTOR DEVICE INCLUDING AT LEAST SIX TRANSISTOR FORMING LINEAR SHAPES INCLUDING AT LEAST TWO TRANSISTOR FORMING LINEAR SHAPES HAVING DIFFERENT EXTENSION DISTANCES BEYOND GATE CONTACT
|
|
|
Patent #:
|
|
Issue Dt:
|
09/04/2012
|
Application #:
|
12572243
|
Filing Dt:
|
10/01/2009
|
Publication #:
|
|
Pub Dt:
|
02/04/2010
| | | | |
Title:
|
SEMICONDUCTOR DEVICE INCLUDING AT LEAST SIX TRANSISTOR FORMING LINEAR SHAPES WITH AT LEAST TWO TRANSISTOR FORMING LINEAR SHAPES HAVING OFFSET ENDS
|
|
Assignee
|
|
|
4040 MOORPARK AVENUE |
SUITE 250 |
SAN JOSE, CALIFORNIA 95117 |
|
Correspondence name and address
|
|
ALISON L. MCCARTHY
|
|
125 HIGH ST., 19TH FL., HIGH ST. TOWER
|
|
PEPPER HAMILTON LLP
|
|
BOSTON, MA 02110
|
Search Results as of:
09/22/2024 04:56 PM
If you have any comments or questions concerning the data displayed,
contact
PRD / Assignments at 571-272-3350. v.2.6
Web interface last modified:
August 25, 2017 v.2.6
|