|
Total properties:
94
|
|
|
|
Patent #:
|
|
Issue Dt:
|
07/12/2005
|
Application #:
|
10060185
|
Filing Dt:
|
02/01/2002
|
|
Publication #:
|
|
Pub Dt:
|
03/06/2003
| | | | |
|
Title:
|
NONVOLATILE SEMICONDUCTOR MEMORY DEVICE
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
01/27/2004
|
Application #:
|
10067411
|
Filing Dt:
|
02/05/2002
|
|
Publication #:
|
|
Pub Dt:
|
08/07/2003
| | | | |
|
Title:
|
SUPPRESSION OF LEAKAGE CURRENTS IN VLSI LOGIC AND MEMORY CIRCUITS
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
06/01/2004
|
Application #:
|
10305756
|
Filing Dt:
|
11/26/2002
|
|
Title:
|
PROGRAM ALGORITHM INCLUDING SOFT ERASE FOR SONOS MEMORY DEVICE
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
11/04/2003
|
Application #:
|
10349293
|
Filing Dt:
|
01/21/2003
|
|
Title:
|
METHOD FOR IMPROVING READ MARGIN IN A FLASH MEMORY DEVICE
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
03/29/2005
|
Application #:
|
10662810
|
Filing Dt:
|
09/16/2003
|
|
Publication #:
|
|
Pub Dt:
|
05/13/2004
| | | | |
|
Title:
|
SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURING THE SAME
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
09/12/2006
|
Application #:
|
11069501
|
Filing Dt:
|
03/01/2005
|
|
Publication #:
|
|
Pub Dt:
|
09/29/2005
| | | | |
|
Title:
|
METHODS FOR FORMING SUPER-STEEP DIFFUSION REGION PROFILES IN MOS DEVICES AND RESULTING SEMICONDUCTOR TOPOGRAPHIES
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
05/22/2007
|
Application #:
|
11075632
|
Filing Dt:
|
03/08/2005
|
|
Title:
|
PROGRAMMABLE LOW VOLTAGE RESET APPARATUS FOR MULTI-VDD CHIPS
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
08/15/2006
|
Application #:
|
11116589
|
Filing Dt:
|
04/28/2005
|
|
Title:
|
METHOD AND APPARATUS FOR REDUCING SOFT ERROR RATE IN SRAM ARRAYS USING ELEVATED SRAM VOLTAGE DURING PERIODS OF LOW ACTIVITY
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
08/28/2007
|
Application #:
|
11146126
|
Filing Dt:
|
06/07/2005
|
|
Title:
|
SYSTEM AND METHOD FOR REDUCING PROCESS-INDUCED CHARGING
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
08/28/2007
|
Application #:
|
11228777
|
Filing Dt:
|
09/16/2005
|
|
Publication #:
|
|
Pub Dt:
|
03/30/2006
| | | | |
|
Title:
|
SEMICONDUCTOR MEMORY DEVICE USING READ DATA BUS FOR WRITING DATA DURING HIGH-SPEED WRITING
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
10/07/2008
|
Application #:
|
11229519
|
Filing Dt:
|
09/20/2005
|
|
Publication #:
|
|
Pub Dt:
|
03/22/2007
| | | | |
|
Title:
|
MULTI-BIT FLASH MEMORY DEVICE HAVING IMPROVED PROGRAM RATE
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
09/09/2008
|
Application #:
|
11332241
|
Filing Dt:
|
01/17/2006
|
|
Publication #:
|
|
Pub Dt:
|
07/19/2007
| | | | |
|
Title:
|
RANDOM CACHE READ USING A DOUBLE MEMORY
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
08/07/2012
|
Application #:
|
11359205
|
Filing Dt:
|
02/21/2006
|
|
Publication #:
|
|
Pub Dt:
|
08/23/2007
| | | | |
|
Title:
|
INTERNALLY DERIVED ADDRESS GENERATION SYSTEM AND METHOD FOR BURST LOADING OF A SYNCHRONOUS MEMORY
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
02/10/2009
|
Application #:
|
11398414
|
Filing Dt:
|
04/05/2006
|
|
Publication #:
|
|
Pub Dt:
|
10/25/2007
| | | | |
|
Title:
|
REDUCTION OF LEAKAGE CURRENT AND PROGRAM DISTURBS IN FLASH MEMORY DEVICES
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
10/07/2008
|
Application #:
|
11409361
|
Filing Dt:
|
04/20/2006
|
|
Title:
|
MEMORY DEVICE AND METHODS FOR ITS FABRICATION
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
05/26/2009
|
Application #:
|
11416703
|
Filing Dt:
|
05/03/2006
|
|
Title:
|
TWO-BIT MEMORY CELL HAVING CONDUCTIVE CHARGE STORAGE SEGMENTS AND METHOD FOR FABRICATING SAME
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
05/27/2008
|
Application #:
|
11424934
|
Filing Dt:
|
06/19/2006
|
|
Publication #:
|
|
Pub Dt:
|
07/12/2007
| | | | |
|
Title:
|
AUTOMATED LOADING/UNLOADING OF DEVICES FOR BURN-IN TESTING
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
02/16/2010
|
Application #:
|
11438324
|
Filing Dt:
|
05/23/2006
|
|
Publication #:
|
|
Pub Dt:
|
08/23/2007
| | | | |
|
Title:
|
SEMICONDUCTOR MEMORY DEVICE AND CONTROL METHOD THEREOF
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
06/01/2010
|
Application #:
|
11439124
|
Filing Dt:
|
05/24/2006
|
|
Publication #:
|
|
Pub Dt:
|
10/04/2007
| | | | |
|
Title:
|
CYCLE SIMULATION METHOD, CYCLE SIMULATOR, AND COMPUTER PRODUCT
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
09/02/2008
|
Application #:
|
11447852
|
Filing Dt:
|
06/07/2006
|
|
Publication #:
|
|
Pub Dt:
|
08/16/2007
| | | | |
|
Title:
|
PHASE ADJUSTER CIRCUIT AND PHASE ADJUSTING METHOD
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
07/14/2009
|
Application #:
|
11465701
|
Filing Dt:
|
08/18/2006
|
|
Publication #:
|
|
Pub Dt:
|
05/29/2008
| | | | |
|
Title:
|
SELECT TRANSISTOR USING BURIED BIT LINE FROM CORE
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
10/28/2008
|
Application #:
|
11470958
|
Filing Dt:
|
09/07/2006
|
|
Publication #:
|
|
Pub Dt:
|
03/13/2008
| | | | |
|
Title:
|
MEMORY ERASE MANAGEMENT SYSTEM
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
03/31/2009
|
Application #:
|
11494477
|
Filing Dt:
|
07/28/2006
|
|
Publication #:
|
|
Pub Dt:
|
10/18/2007
| | | | |
|
Title:
|
PARALLEL PROCESSING APPARATUS DYNAMICALLY SWITCHING OVER CIRCUIT CONFIGURATION
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
03/16/2010
|
Application #:
|
11512334
|
Filing Dt:
|
08/30/2006
|
|
Publication #:
|
|
Pub Dt:
|
09/27/2007
| | | | |
|
Title:
|
ELECTRONIC DEVICE INCORPORATING SYSTEM POWER SUPPLY UNIT AND METHOD FOR SUPPLYING POWER SUPPLY VOLTAGE
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
04/27/2010
|
Application #:
|
11526051
|
Filing Dt:
|
09/25/2006
|
|
Publication #:
|
|
Pub Dt:
|
09/13/2007
| | | | |
|
Title:
|
DC-DC CONVERTER CONTROL CIRCUIT, DC-DC CONVERTER, POWER SUPPLY UNIT, AND DC-DC CONVERTER CONTROL METHOD
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
03/09/2010
|
Application #:
|
11527496
|
Filing Dt:
|
09/27/2006
|
|
Publication #:
|
|
Pub Dt:
|
10/04/2007
| | | | |
|
Title:
|
CONTROL CIRCUIT OF POWER SUPPLY AND CONTROL METHOD OF THE POWER SUPPLY
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
12/15/2009
|
Application #:
|
11538403
|
Filing Dt:
|
10/03/2006
|
|
Publication #:
|
|
Pub Dt:
|
04/17/2008
| | | | |
|
Title:
|
METHODS FOR CONTROLLING THE PROFILE OF A TRENCH OF A SEMICONDUCTOR STRUCTURE
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
12/22/2009
|
Application #:
|
11614050
|
Filing Dt:
|
12/20/2006
|
|
Publication #:
|
|
Pub Dt:
|
06/26/2008
| | | | |
|
Title:
|
METHODS FOR FABRICATING A MEMORY DEVICE INCLUDING A DUAL BIT MEMORY CELL
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
04/06/2010
|
Application #:
|
11614770
|
Filing Dt:
|
12/21/2006
|
|
Publication #:
|
|
Pub Dt:
|
06/26/2008
| | | | |
|
Title:
|
COPPER PROCESS METHODOLOGY
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
07/22/2014
|
Application #:
|
11614815
|
Filing Dt:
|
12/21/2006
|
|
Publication #:
|
|
Pub Dt:
|
06/26/2008
| | | | |
|
Title:
|
MEMORY SYSTEM WITH FIN FET TECHNOLOGY
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
11/24/2009
|
Application #:
|
11615563
|
Filing Dt:
|
12/22/2006
|
|
Publication #:
|
|
Pub Dt:
|
06/26/2008
| | | | |
|
Title:
|
MEMORY DEVICE HAVING IMPLANTED OXIDE TO BLOCK ELECTRON DRIFT, AND METHOD OF MANUFACTURING THE SAME
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
02/26/2013
|
Application #:
|
11707178
|
Filing Dt:
|
02/14/2007
|
|
Title:
|
GRAPHICAL USER ASSIGNABLE REGISTER MAP
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
08/19/2014
|
Application #:
|
11707201
|
Filing Dt:
|
02/14/2007
|
|
Title:
|
GLOBAL RESOURCE CONFLICT MANAGEMENT FOR AN EMBEDDED APPLICATION DESIGN
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
04/15/2014
|
Application #:
|
11707202
|
Filing Dt:
|
02/14/2007
|
|
Title:
|
GLOBAL PARAMETER MANAGEMENT GRAPHICAL USER INTERFACE (GUI) FOR EMBEDDED APPLICATION DESIGN
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
02/24/2009
|
Application #:
|
11731605
|
Filing Dt:
|
03/29/2007
|
|
Title:
|
MEMORY SYSTEM HAVING HIGH-SPEED ROW BLOCK AND COLUMN REDUNDANCY
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
03/17/2009
|
Application #:
|
11741996
|
Filing Dt:
|
04/30/2007
|
|
Publication #:
|
|
Pub Dt:
|
10/30/2008
| | | | |
|
Title:
|
TRANSFER OF NON-ASSOCIATED INFORMATION ON FLASH MEMORY DEVICES
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
12/01/2009
|
Application #:
|
11745327
|
Filing Dt:
|
05/07/2007
|
|
Publication #:
|
|
Pub Dt:
|
11/13/2008
| | | | |
|
Title:
|
MULTI-PHASE WORDLINE ERASING FOR FLASH MEMORY
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
09/28/2010
|
Application #:
|
11782507
|
Filing Dt:
|
07/24/2007
|
|
Publication #:
|
|
Pub Dt:
|
11/22/2007
| | | | |
|
Title:
|
SYSTEM AND METHOD FOR REDUCING PROCESS-INDUCED CHARGING
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
01/19/2010
|
Application #:
|
11824216
|
Filing Dt:
|
06/30/2007
|
|
Title:
|
MULTI-SITE OPTICAL POWER CALIBRATION SYSTEM AND METHOD
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
05/19/2009
|
Application #:
|
11834420
|
Filing Dt:
|
08/06/2007
|
|
Publication #:
|
|
Pub Dt:
|
02/12/2009
| | | | |
|
Title:
|
READING MULTI-CELL MEMORY DEVICES UTILIZING COMPLEMENTARY BIT INFORMATION
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
07/07/2009
|
Application #:
|
11837949
|
Filing Dt:
|
08/13/2007
|
|
Publication #:
|
|
Pub Dt:
|
02/19/2009
| | | | |
|
Title:
|
EFFICIENT AND SYSTEMATIC MEASUREMENT FLOW ON DRAIN VOLTAGE FOR DIFFERENT TRIMMING IN FLASH SILICON CHARACTERIZATION
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
04/24/2012
|
Application #:
|
11843216
|
Filing Dt:
|
08/22/2007
|
|
Publication #:
|
|
Pub Dt:
|
10/23/2008
| | | | |
|
Title:
|
NON-RESISTIVE LOAD DRIVER
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
08/02/2016
|
Application #:
|
11855281
|
Filing Dt:
|
09/14/2007
|
|
Publication #:
|
|
Pub Dt:
|
10/23/2008
| | | | |
|
Title:
|
REDUCING POWER CONSUMPTION IN A LIQUID CRYSTAL DISPLAY
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
12/02/2014
|
Application #:
|
11864137
|
Filing Dt:
|
09/28/2007
|
|
Publication #:
|
|
Pub Dt:
|
10/23/2008
| | | | |
|
Title:
|
CONFIGURABLE LIQUID CRYSTAL DISPLAY DRIVER SYSTEM
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
12/08/2009
|
Application #:
|
11872989
|
Filing Dt:
|
10/16/2007
|
|
Publication #:
|
|
Pub Dt:
|
04/16/2009
| | | | |
|
Title:
|
CONTROLLED RAMP RATES FOR METAL BITLINES DURING WRITE OPERATIONS FROM HIGH VOLTAGE DRIVER FOR MEMORY APPLICATIONS
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
10/15/2013
|
Application #:
|
11873810
|
Filing Dt:
|
10/17/2007
|
|
Publication #:
|
|
Pub Dt:
|
04/23/2009
| | | | |
|
Title:
|
HYBRID FLASH MEMORY DEVICE
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
03/16/2010
|
Application #:
|
11898575
|
Filing Dt:
|
09/13/2007
|
|
Publication #:
|
|
Pub Dt:
|
03/20/2008
| | | | |
|
Title:
|
POWER SUPPLY SYSTEM AND METHOD FOR CONTROLLING OUTPUT VOLTAGE
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
12/01/2009
|
Application #:
|
11902798
|
Filing Dt:
|
09/25/2007
|
|
Publication #:
|
|
Pub Dt:
|
03/27/2008
| | | | |
|
Title:
|
CIRCUIT FOR CORRECTING SENSOR TEMPERATURE CHARACTERISTICS
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
07/10/2012
|
Application #:
|
11949521
|
Filing Dt:
|
12/03/2007
|
|
Publication #:
|
|
Pub Dt:
|
06/04/2009
| | | | |
|
Title:
|
DIRECT INTERCONNECTION BETWEEN PROCESSOR AND MEMORY COMPONENT
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
01/27/2009
|
Application #:
|
11949637
|
Filing Dt:
|
12/03/2007
|
|
Title:
|
FORMING METAL-SEMICONDUCTOR FILMS HAVING DIFFERENT THICKNESSES WITHIN DIFFERENT REGIONS OF AN ELECTRONIC DEVICE
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
04/06/2010
|
Application #:
|
11958557
|
Filing Dt:
|
12/18/2007
|
|
Publication #:
|
|
Pub Dt:
|
06/18/2009
| | | | |
|
Title:
|
REDUCED STATE QUADBIT
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
11/17/2009
|
Application #:
|
11959122
|
Filing Dt:
|
12/18/2007
|
|
Publication #:
|
|
Pub Dt:
|
06/18/2009
| | | | |
|
Title:
|
ALGORITHM FOR CHARGE LOSS REDUCTION AND VT DISTRIBUTION IMPROVEMENT
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
04/01/2014
|
Application #:
|
11965520
|
Filing Dt:
|
12/27/2007
|
|
Publication #:
|
|
Pub Dt:
|
10/23/2008
| | | | |
|
Title:
|
ACTIVE LIQUID CRYSTAL DISPLAY DRIVERS AND DUTY CYCLE OPERATION
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
01/12/2010
|
Application #:
|
11966672
|
Filing Dt:
|
12/28/2007
|
|
Publication #:
|
|
Pub Dt:
|
07/02/2009
| | | | |
|
Title:
|
ARRAYED NEUTRON DETECTOR WITH MULTI SHIELDING ALLOWING FOR DISCRIMINATION BETWEEN RADIATION TYPES
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
10/20/2009
|
Application #:
|
11975097
|
Filing Dt:
|
10/16/2007
|
|
Publication #:
|
|
Pub Dt:
|
04/24/2008
| | | | |
|
Title:
|
VOLTAGE DETECTOR CIRCUIT
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
09/04/2012
|
Application #:
|
12008527
|
Filing Dt:
|
01/11/2008
|
|
Title:
|
SPECKLE-BASED OPTICAL NAVIGATION ON CURVED TRACKING SURFACE
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
04/16/2013
|
Application #:
|
12036634
|
Filing Dt:
|
02/25/2008
|
|
Publication #:
|
|
Pub Dt:
|
08/28/2008
| | | | |
|
Title:
|
COMPUTER SYSTEM AND MEMORY SYSTEM
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
05/13/2014
|
Application #:
|
12037297
|
Filing Dt:
|
02/26/2008
|
|
Publication #:
|
|
Pub Dt:
|
08/28/2008
| | | | |
|
Title:
|
SIMULATION METHOD AND SIMULATION APPARATUS
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
07/28/2009
|
Application #:
|
12055141
|
Filing Dt:
|
03/25/2008
|
|
Publication #:
|
|
Pub Dt:
|
07/17/2008
| | | | |
|
Title:
|
AUTOMATED LOADING/UNLOADING OF DEVICES FOR BURN-IN TESTING
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
06/01/2010
|
Application #:
|
12059953
|
Filing Dt:
|
03/31/2008
|
|
Title:
|
CIRCUIT AND METHOD FOR CASCADING PROGRAMMABLE IMPEDANCE MATCHING IN A MULTI-CHIP SYSTEM
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
10/22/2013
|
Application #:
|
12111122
|
Filing Dt:
|
04/28/2008
|
|
Publication #:
|
|
Pub Dt:
|
10/29/2009
| | | | |
|
Title:
|
METHODS FOR FABRICATING MEMORY CELLS HAVING FIN STRUCTURES WITH SMOOTH SIDEWALLS AND ROUNDED TOP CORNERS AND EDGES
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
02/19/2013
|
Application #:
|
12138307
|
Filing Dt:
|
06/12/2008
|
|
Publication #:
|
|
Pub Dt:
|
06/11/2009
| | | | |
|
Title:
|
COMMAND CONTROL FOR SYNCHRONOUS MEMORY DEVICE
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
07/21/2009
|
Application #:
|
12199692
|
Filing Dt:
|
08/27/2008
|
|
Publication #:
|
|
Pub Dt:
|
12/25/2008
| | | | |
|
Title:
|
MEMORY DEVICE AND METHODS FOR ITS FABRICATION
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
03/19/2013
|
Application #:
|
12218021
|
Filing Dt:
|
07/10/2008
|
|
Title:
|
USER INTERFACE DEVICES, METHODS, AND COMPUTER READABLE MEDIA FOR SENSING MOVEMENT OF AN ACTUATOR ACROSS A SURFACE OF A WINDOW
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
04/16/2013
|
Application #:
|
12259100
|
Filing Dt:
|
10/27/2008
|
|
Publication #:
|
|
Pub Dt:
|
11/26/2009
| | | | |
|
Title:
|
SYSTEM AND METHOD FOR STACKING A PLURALITY OF ELECTRICALLY COUPLED SEMICONDUCTOR CHIPS WITH A CONDUCTIVE PIN
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
03/25/2014
|
Application #:
|
12322105
|
Filing Dt:
|
01/28/2009
|
|
Publication #:
|
|
Pub Dt:
|
07/29/2010
| | | | |
|
Title:
|
Self-aligned double patterning for memory and other microelectronic devices
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
01/08/2013
|
Application #:
|
12332673
|
Filing Dt:
|
12/11/2008
|
|
Publication #:
|
|
Pub Dt:
|
10/29/2009
| | | | |
|
Title:
|
SEMICONDUCTOR INTEGRATED CIRCUIT IN A CARRY COMPUTATION NETWORK HAVING A LOGIC BLOCKS WHICH ARE DYNAMICALLY RECONFIGURABLE
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
02/01/2011
|
Application #:
|
12340274
|
Filing Dt:
|
12/19/2008
|
|
Publication #:
|
|
Pub Dt:
|
06/04/2009
| | | | |
|
Title:
|
FORMING METAL-SEMICONDUCTOR FILMS HAVING DIFFERENT THICKNESSES WITHIN DIFFERENT REGIONS OF AN ELECTRONIC DEVICE
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
04/29/2014
|
Application #:
|
12413354
|
Filing Dt:
|
03/27/2009
|
|
Title:
|
DUAL PROTOCOL INPUT DEVICE
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
07/24/2012
|
Application #:
|
12492922
|
Filing Dt:
|
06/26/2009
|
|
Publication #:
|
|
Pub Dt:
|
10/15/2009
| | | | |
|
Title:
|
AUTOMATED LOADING/UNLOADING OF DEVICES FOR BURN-IN TESTING
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
01/31/2012
|
Application #:
|
12492968
|
Filing Dt:
|
06/26/2009
|
|
Publication #:
|
|
Pub Dt:
|
10/22/2009
| | | | |
|
Title:
|
AUTOMATED LOADING/UNLOADING OF DEVICES FOR BURN-IN TESTING
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
07/31/2012
|
Application #:
|
12497022
|
Filing Dt:
|
07/02/2009
|
|
Publication #:
|
|
Pub Dt:
|
01/21/2010
| | | | |
|
Title:
|
DESIGN PROGRAM, DESIGN APPARATUS, AND DESIGN METHOD FOR DYNAMIC RECONFIGURABLE CIRCUIT
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
10/16/2012
|
Application #:
|
12503455
|
Filing Dt:
|
07/15/2009
|
|
Publication #:
|
|
Pub Dt:
|
01/21/2010
| | | | |
|
Title:
|
DATA CONVERSION APPARATUS, METHOD, AND COMPUTER-READABLE RECORDING MEDIUM STORING PROGRAM FOR GENERATING CIRCUIT CONFIGURATION INFORMATION FROM CIRCUIT DESCRIPTION
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
06/03/2014
|
Application #:
|
12708332
|
Filing Dt:
|
02/18/2010
|
|
Publication #:
|
|
Pub Dt:
|
06/10/2010
| | | | |
|
Title:
|
CHARGING CIRCUIT
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
04/01/2014
|
Application #:
|
12722083
|
Filing Dt:
|
03/11/2010
|
|
Publication #:
|
|
Pub Dt:
|
09/15/2011
| | | | |
|
Title:
|
NON-VOLATILE FINFET MEMORY DEVICE AND MANUFACTURING METHOD THEREOF
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
06/03/2014
|
Application #:
|
12729864
|
Filing Dt:
|
03/23/2010
|
|
Publication #:
|
|
Pub Dt:
|
09/30/2010
| | | | |
|
Title:
|
INTEGRATED CIRCUIT, DEBUGGING CIRCUIT, AND DEBUGGING COMMAND CONTROL METHOD
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
11/26/2013
|
Application #:
|
12794158
|
Filing Dt:
|
06/04/2010
|
|
Publication #:
|
|
Pub Dt:
|
12/09/2010
| | | | |
|
Title:
|
VOLTAGE ADJUSTMENT CIRCUIT AND DISPLAY DEVICE DRIVING CIRCUIT
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
07/16/2013
|
Application #:
|
12817692
|
Filing Dt:
|
06/17/2010
|
|
Publication #:
|
|
Pub Dt:
|
12/23/2010
| | | | |
|
Title:
|
TIMING CONTROLLER, TIMING CONTROL METHOD, AND TIMING CONTROL SYSTEM
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
06/19/2012
|
Application #:
|
12860074
|
Filing Dt:
|
08/20/2010
|
|
Publication #:
|
|
Pub Dt:
|
12/16/2010
| | | | |
|
Title:
|
SYSTEM AND METHOD FOR REDUCING PROCESS-INDUCED CHARGING
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
05/07/2013
|
Application #:
|
12974996
|
Filing Dt:
|
12/21/2010
|
|
Publication #:
|
|
Pub Dt:
|
06/30/2011
| | | | |
|
Title:
|
OSCILLATING APPARATUS
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
01/28/2014
|
Application #:
|
13008374
|
Filing Dt:
|
01/18/2011
|
|
Publication #:
|
|
Pub Dt:
|
07/21/2011
| | | | |
|
Title:
|
CONTROL CIRCUIT FOR STEP-DOWN AND BOOST TYPE SWITCHING SUPPLY CIRCUIT AND METHOD FOR SWITCHING SUPPLY CIRCUIT
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
02/18/2014
|
Application #:
|
13071385
|
Filing Dt:
|
03/24/2011
|
|
Publication #:
|
|
Pub Dt:
|
09/27/2012
| | | | |
|
Title:
|
INTEGRATING TRANSISTORS WITH DIFFERENT POLY-SILICON HEIGHTS ON THE SAME DIE
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
10/29/2013
|
Application #:
|
13100876
|
Filing Dt:
|
05/04/2011
|
|
Publication #:
|
|
Pub Dt:
|
09/29/2011
| | | | |
|
Title:
|
LOAD DRIVER
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
03/18/2014
|
Application #:
|
13340990
|
Filing Dt:
|
12/30/2011
|
|
Title:
|
REPLICA NODE FEEDBACK CIRCUIT FOR REGULATED POWER SUPPLY
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
03/18/2014
|
Application #:
|
13371533
|
Filing Dt:
|
02/13/2012
|
|
Publication #:
|
|
Pub Dt:
|
08/30/2012
| | | | |
|
Title:
|
MOTOR CONTROL DEVICE WITH A CORRECTING UNIT DETERMINING A CORRECTED ROTATION ANGLE AFTER A PREDETERMINED TIME FROM A DETECTION TIME, CONTROL PROGRAM THEREFOR, AND METHOD FOR THE CONTROL
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
05/31/2016
|
Application #:
|
13538646
|
Filing Dt:
|
06/29/2012
|
|
Publication #:
|
|
Pub Dt:
|
10/25/2012
| | | | |
|
Title:
|
AUTOMATED LOADING/UNLOADING OF DEVICES FOR BURN-IN TESTING
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
07/19/2016
|
Application #:
|
13725637
|
Filing Dt:
|
12/21/2012
|
|
Publication #:
|
|
Pub Dt:
|
03/20/2014
| | | | |
|
Title:
|
SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURING THEREOF
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
09/01/2015
|
Application #:
|
14066263
|
Filing Dt:
|
10/29/2013
|
|
Publication #:
|
|
Pub Dt:
|
07/03/2014
| | | | |
|
Title:
|
LOAD DRIVER
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
12/19/2017
|
Application #:
|
14089048
|
Filing Dt:
|
11/25/2013
|
|
Publication #:
|
|
Pub Dt:
|
03/27/2014
| | | | |
|
Title:
|
Voltage Adjustment Circuit and Display Device Driving Circuit
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
08/30/2016
|
Application #:
|
14149521
|
Filing Dt:
|
01/07/2014
|
|
Publication #:
|
|
Pub Dt:
|
05/01/2014
| | | | |
|
Title:
|
INTEGRATING TRANSISTORS WITH DIFFERENT POLY-SILICON HEIGHTS ON THE SAME DIE
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
07/22/2014
|
Application #:
|
14171312
|
Filing Dt:
|
02/03/2014
|
|
Publication #:
|
|
Pub Dt:
|
05/29/2014
| | | | |
|
Title:
|
NON-VOLATILE FINFET MEMORY DEVICE AND MANUFACTURING METHOD THEREOF
|
|
|
|
|
Patent #:
|
NONE
|
Issue Dt:
|
|
Application #:
|
14204373
|
Filing Dt:
|
03/11/2014
|
|
Publication #:
|
|
Pub Dt:
|
07/10/2014
| | | | |
|
Title:
|
SELF-ALIGNED DOUBLE PATTERNING FOR MEMORY AND OTHER MICROELECTRONIC DEVICES
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
12/06/2016
|
Application #:
|
14218169
|
Filing Dt:
|
03/18/2014
|
|
Publication #:
|
|
Pub Dt:
|
07/17/2014
| | | | |
|
Title:
|
DEBUG CONTROL CIRCUIT
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
03/20/2018
|
Application #:
|
14829938
|
Filing Dt:
|
08/19/2015
|
|
Publication #:
|
|
Pub Dt:
|
01/07/2016
| | | | |
|
Title:
|
LOAD DRIVER
|
|
