Patent Assignment Details
NOTE:Results display only for issued patents and published applications.
For pending or abandoned applications please consult USPTO staff.
|
| Reel/Frame: | 015338/0982 | |
| Pages: | 3 |
| | Recorded: | 11/04/2004 | | |
| Conveyance: | ASSIGNMENT OF ASSIGNORS INTEREST (SEE DOCUMENT FOR DETAILS). |
|
|
Total properties:
1
|
|
|
|
Patent #:
|
|
Issue Dt:
|
08/18/2009
|
Application #:
|
10961751
|
Filing Dt:
|
10/08/2004
|
|
Publication #:
|
|
Pub Dt:
|
04/13/2006
| | | | |
|
Title:
|
LOW LATENCY COHERENCY PROTOCOL FOR A MULTI-CHIP MULTIPROCESSOR SYSTEM
|
|
|
Assignee
|
|
|
|
|
| NEW ORCHARD ROAD |
| ARMONK, NEW YORK 10504 |
|
|
Correspondence name and address
|
| |
IBM CORPORATION, DEPT. 917
|
| |
ROBERT R. WILLIAMS
|
| |
3605 HIGHWAY 52 NORTH
|
| |
ROCHESTER, MN 55901-7829
|
Search Results as of:
06/26/2025 06:05 PM
If you have any comments or questions concerning the data displayed,
contact
PRD / Assignments at 571-272-3350. v.2.6
Web interface last modified:
August 25, 2017 v.2.6
|
