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Patent Assignment Details
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Reel/Frame:024707/0984   Pages: 10
Recorded: 07/19/2010
Attorney Dkt #:116953-*
Conveyance: ASSIGNMENT OF ASSIGNORS INTEREST (SEE DOCUMENT FOR DETAILS).
Total properties: 4
1
Patent #:
NONE
Issue Dt:
Application #:
11771689
Filing Dt:
06/29/2007
Publication #:
Pub Dt:
01/10/2008
Title:
PIPELINED SEMICONDUCTOR MEMORIES AND SYSTEMS
2
Patent #:
Issue Dt:
01/11/2011
Application #:
12545730
Filing Dt:
08/21/2009
Publication #:
Pub Dt:
12/17/2009
Title:
DIGITAL MEMORY WITH CONTROLLABLE INPUT/OUTPUT TERMINALS
3
Patent #:
Issue Dt:
10/09/2012
Application #:
12751632
Filing Dt:
03/31/2010
Publication #:
Pub Dt:
07/29/2010
Title:
MEMORIES FOR ELECTRONIC SYSTEMS
4
Patent #:
Issue Dt:
08/30/2011
Application #:
12767517
Filing Dt:
04/26/2010
Publication #:
Pub Dt:
08/12/2010
Title:
MEMORIES WITH FRONT END PRECHARGE
Assignor
1
Exec Dt:
04/23/2007
Assignee
1
2711 CENTERVILLE ROAD, SUITE 400
WILMINGTON, DELAWARE 19808
Correspondence name and address
SCHWABE, WILLIAMSON & WYATT PC
1420 5TH AVENUE SUITE 3400
SEATTLE, WA 98101

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