skip navigationU S P T O SealUnited States Patent and Trademark Office AOTW logo
Home|Site Index|Search|Guides|Contacts|eBusiness|eBiz alerts|News|Help
Assignments on the Web > Patent Query
Patent Assignment Details
NOTE:Results display only for issued patents and published applications. For pending or abandoned applications please consult USPTO staff.

Reel/Frame:064742/0988   Pages: 4
Recorded: 08/28/2023
Conveyance: CHANGE OF NAME (SEE DOCUMENT FOR DETAILS).
Total properties: 27
1
Patent #:
Issue Dt:
02/11/2003
Application #:
10005877
Filing Dt:
12/07/2001
Publication #:
Pub Dt:
06/27/2002
Title:
CIRCUIT AND METHOD FOR CONTROLLING BUFFERS IN SEMICONDUCTOR MEMORY DEVICE
2
Patent #:
Issue Dt:
07/06/2004
Application #:
10024366
Filing Dt:
12/21/2001
Publication #:
Pub Dt:
03/20/2003
Title:
LOW POWER SEMICONDUCTOR MEMORY DEVICE HAVING A NORMAL MODE AND A PARTIAL ARRAY SELF REFRESH MODE
3
Patent #:
Issue Dt:
01/14/2003
Application #:
10033509
Filing Dt:
12/27/2001
Publication #:
Pub Dt:
07/04/2002
Title:
METHOD OF MANUFACTURING SEMICONDUCTOR DEVICES WITH TITANIUM ALUMINUM NITRIDE WORK FUNCTION
4
Patent #:
Issue Dt:
02/25/2003
Application #:
10033989
Filing Dt:
12/28/2001
Title:
DUTY CORRECTION CIRCUIT AND A METHOD OF CORRECTING A DUTY
5
Patent #:
Issue Dt:
11/16/2004
Application #:
10034504
Filing Dt:
12/28/2001
Publication #:
Pub Dt:
04/10/2003
Title:
METHOD OF MANUFACTURING A CONTACT PLUG FOR A SEMICONDUCTOR DEVICE
6
Patent #:
Issue Dt:
08/05/2003
Application #:
10035082
Filing Dt:
12/28/2001
Publication #:
Pub Dt:
07/04/2002
Title:
DUTY CYCLE CORRECTION CIRCUIT
7
Patent #:
Issue Dt:
11/04/2003
Application #:
10253779
Filing Dt:
09/25/2002
Publication #:
Pub Dt:
05/01/2003
Title:
CMOS OF SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURING THE SAME
8
Patent #:
Issue Dt:
08/16/2005
Application #:
10653578
Filing Dt:
09/02/2003
Publication #:
Pub Dt:
03/03/2005
Title:
HIGH VOLTAGE SUPPLY CIRCUIT AND A METHOD OF SUPPLYING HIGH VOLTAGE
9
Patent #:
Issue Dt:
01/03/2006
Application #:
10875387
Filing Dt:
06/25/2004
Publication #:
Pub Dt:
05/05/2005
Title:
DATA OUTPUT CONTROL CIRCUIT
10
Patent #:
Issue Dt:
01/30/2007
Application #:
10879274
Filing Dt:
06/30/2004
Publication #:
Pub Dt:
06/23/2005
Title:
MEMORY APPARATUS HAVING MULTI-PORT ARCHITECTURE FOR SUPPORTING MULTI PROCESSOR
11
Patent #:
Issue Dt:
05/09/2006
Application #:
10880381
Filing Dt:
06/29/2004
Publication #:
Pub Dt:
06/30/2005
Title:
WRITE CIRCUIT OF DOUBLE DATA RATE SYNCHRONOUS DRAM
12
Patent #:
Issue Dt:
02/22/2005
Application #:
10883099
Filing Dt:
06/30/2004
Publication #:
Pub Dt:
02/24/2005
Title:
APPARATUS AND METHOD OF COMPENSATING FOR PHASE DELAY IN SEMICONDUCTOR DEVICE
13
Patent #:
Issue Dt:
11/21/2006
Application #:
11293124
Filing Dt:
12/05/2005
Publication #:
Pub Dt:
04/20/2006
Title:
METHOD OF INHIBITING DEGRADATION OF GATE OXIDE FILM
14
Patent #:
Issue Dt:
10/14/2008
Application #:
11502920
Filing Dt:
08/11/2006
Publication #:
Pub Dt:
11/08/2007
Title:
PMOS TRANSISTOR OF SEMICONDUCTOR DEVICE, SEMICONDUCTOR DEVICE COMPRISING THE SAME, AND METHOD FOR MANUFACTURING THE SAME
15
Patent #:
Issue Dt:
02/10/2009
Application #:
11647402
Filing Dt:
12/29/2006
Publication #:
Pub Dt:
01/03/2008
Title:
SEMICONDUCTOR MEMORY DEVICE AND DRIVING METHOD THEREOF
16
Patent #:
Issue Dt:
11/06/2012
Application #:
11809244
Filing Dt:
05/30/2007
Publication #:
Pub Dt:
01/03/2008
Title:
MEMORY CHIP ARCHITECTURE HAVING NON-RECTANGULAR MEMORY BANKS AND METHOD FOR ARRANGING MEMORY BANKS
17
Patent #:
Issue Dt:
06/29/2010
Application #:
12354158
Filing Dt:
01/15/2009
Publication #:
Pub Dt:
05/14/2009
Title:
SEMICONDUCTOR MEMORY DEVICE AND DRIVING METHOD THEREOF
18
Patent #:
Issue Dt:
05/14/2013
Application #:
13335234
Filing Dt:
12/22/2011
Title:
SEMICONDUCTOR MEMORY DEVICE FOR CONTROLLING WRITE RECOVERY TIME
19
Patent #:
Issue Dt:
05/21/2013
Application #:
13367023
Filing Dt:
02/06/2012
Title:
CLOCK SIGNAL GENERATION APPARATUS FOR USE IN SEMICONDUCTOR MEMORY DEVICE AND ITS METHOD
20
Patent #:
Issue Dt:
12/10/2013
Application #:
13538130
Filing Dt:
06/29/2012
Title:
SEMICONDUCTOR MEMORY DEVICE AND DRIVING METHOD THEREOF
21
Patent #:
Issue Dt:
09/02/2014
Application #:
13644528
Filing Dt:
10/04/2012
Publication #:
Pub Dt:
04/04/2013
Title:
REDUCED NOISE DRAM SENSING
22
Patent #:
Issue Dt:
09/16/2014
Application #:
13687198
Filing Dt:
11/28/2012
Publication #:
Pub Dt:
05/30/2013
Title:
INTERPOSER FOR STACKED SEMICONDUCTOR DEVICES
23
Patent #:
Issue Dt:
10/13/2015
Application #:
13689070
Filing Dt:
11/29/2012
Publication #:
Pub Dt:
06/06/2013
Title:
CPU WITH STACKED MEMORY
24
Patent #:
Issue Dt:
08/12/2014
Application #:
13892840
Filing Dt:
05/13/2013
Publication #:
Pub Dt:
09/19/2013
Title:
SEMICONDUCTOR MEMORY DEVICE FOR CONTROLLING WRITE RECOVERY TIME
25
Patent #:
Issue Dt:
04/22/2014
Application #:
13898998
Filing Dt:
05/21/2013
Publication #:
Pub Dt:
09/26/2013
Title:
CLOCK SIGNAL GENERATION APPARATUS FOR USE IN SEMICONDUCTOR MEMORY DEVICE AND ITS METHOD
26
Patent #:
Issue Dt:
12/01/2020
Application #:
14100793
Filing Dt:
12/09/2013
Publication #:
Pub Dt:
04/10/2014
Title:
SEMICONDUCTOR MEMORY DEVICE AND DRIVING METHOD THEREOF
27
Patent #:
Issue Dt:
07/07/2020
Application #:
16387875
Filing Dt:
04/18/2019
Publication #:
Pub Dt:
10/03/2019
Title:
FLASH MEMORY SYSTEM
Assignor
1
Exec Dt:
04/01/2021
Assignee
1
515 LEGGET DRIVE
SUITE 100
OTTAWA, CANADA K2K 3G4
Correspondence name and address
CONVERSANT IP MANAGEMENT CORP.
5830 GRANITE PARKWAY #100-247
PLANO, TX 75024

Search Results as of: 06/19/2024 04:28 PM
If you have any comments or questions concerning the data displayed, contact PRD / Assignments at 571-272-3350. v.2.6
Web interface last modified: August 25, 2017 v.2.6
| .HOME | INDEX| SEARCH | eBUSINESS | CONTACT US | PRIVACY STATEMENT