Patent Assignment Abstract of Title
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Total Assignments:
2
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Patent #:
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Issue Dt:
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09/04/2018
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Application #:
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15820961
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Filing Dt:
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11/22/2017
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Publication #:
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Pub Dt:
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04/05/2018
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Inventors:
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Chung-Ju Lee, Chien-Hua Huang, Chih Wei Lu, Tien-I Bao, Hai-Ching Chen
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Title:
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METHOD AND STRUCTURE FOR SEMICONDUCTOR DEVICE HAVING GATE SPACER PROTECTION LAYER
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Assignment:
1
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ASSIGNMENT OF ASSIGNORS INTEREST (SEE DOCUMENT FOR DETAILS).
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| NO. 8, LI-HSIN RD. 6 |
| SCIENCE-BASED INDUSTRIAL PARK |
| HSIN-CHU, TAIWAN 300-77 |
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| HAYNES AND BOONE, LLP IP SECTION |
| 2323 VICTORY AVENUE |
| SUITE 700 |
| DALLAS, TX 75219 |
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Assignment:
2
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CORRECTIVE ASSIGNMENT TO CORRECT THE 1ST & 2ND ASSIGNOR NAMES PREVIOUSLY RECORDED AT REEL: 044313 FRAME: 0449. ASSIGNOR(S) HEREBY CONFIRMS THE ASSIGNMENT.
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| NO. 8, LI-HSIN RD. 6 |
| SCIENCE-BASED INDUSTRIAL PARK |
| HSIN-CHU, TAIWAN 300-77 |
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| HAYNES AND BOONE, LLP IP SECTION |
| 2323 VICTORY AVENUE |
| SUITE 700 |
| DALLAS, TX 75219 |
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