Patent Assignment Abstract of Title
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Total Assignments:
1
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Patent #:
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Issue Dt:
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11/19/2019
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Application #:
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15912924
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Filing Dt:
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03/06/2018
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Publication #:
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Pub Dt:
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09/27/2018
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Inventors:
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Jiro Yota, Viswanathan Ramanathan, Hong Shen
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Title:
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WAFER LEVEL CHIP SCALE FILTER PACKAGING USING SEMICONDUCTOR WAFERS WITH THROUGH WAFER VIAS
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Assignment:
1
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ASSIGNMENT OF ASSIGNORS INTEREST (SEE DOCUMENT FOR DETAILS).
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| 20 SYLVAN ROAD |
| WOBURN, MASSACHUSETTS 01801 |
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| DONALD BOLLELLA |
| 5221 CALIFORNIA AVENUE, 21-1 |
| IRVINE, CA 92617 |
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