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Patent Assignment Abstract of Title
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Total Assignments: 1
Patent #:
Issue Dt:
12/31/2019
Application #:
16186882
Filing Dt:
11/12/2018
Inventor:
Cheng C. Wang
Title:
Test Circuitry and Techniques for Logic Tiles of FPGA
Assignment: 1
Reel/Frame:
048002/0433Recorded: 12/03/2018Pages: 3
Conveyance:
ASSIGNMENT OF ASSIGNORS INTEREST (SEE DOCUMENT FOR DETAILS).
Assignor:
Exec Dt:
11/12/2018
Assignee:
2465 LATHAM STREET
SUITE 100
MOUNTAIN VIEW, CALIFORNIA 94040
Correspondent:
NEIL A. STEINBERG
5335 WISCONSIN AVE, NW
SUITE 440
WASHINGTON, D.C. 20015

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