Patent Assignment Abstract of Title
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Total Assignments:
1
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Patent #:
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Issue Dt:
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08/18/2020
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Application #:
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16209790
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Filing Dt:
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12/04/2018
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Publication #:
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Pub Dt:
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06/06/2019
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Inventors:
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Takayuki HIROSE, Yutaka TERAO, Aki TAKIGAWA, Etsuko TOMITA
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Title:
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METHOD OF EVALUATING INSULATED-GATE SEMICONDUCTOR DEVICE
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Assignment:
1
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ASSIGNMENT OF ASSIGNORS INTEREST (SEE DOCUMENT FOR DETAILS).
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| 1-1 TANABESHINDEN, KAWASAKI-KU, KAWASAKI-SHI |
| KANAGAWA, JAPAN 210-9530 |
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| MASAO YOSHIMURA, CHEN YOSHIMURA LLP |
| 2975 SCOTT BLVD. |
| SUITE 110 |
| SANTA CLARA, CA 95054 |
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