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Patent Assignment Abstract of Title
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Total Assignments: 1
Patent #:
10825508
Issue Dt:
11/03/2020
Application #:
16712878
Filing Dt:
12/12/2019
Inventors:
Pei-Hsiu Tseng, I-Shuan Wei, Jia-You Lin, Shou-Zen Chang, Chi-Wei Lin, Hung-Hsun Lin
Title:
BIT LINE STRUCTURE FOR TWO-TRANSISTOR STATIC RANDOM ACCESS MEMORY
Assignment: 1
Reel/Frame:
051270/0515Recorded: 12/12/2019Pages: 14
Conveyance:
ASSIGNMENT OF ASSIGNORS INTEREST (SEE DOCUMENT FOR DETAILS).
Assignors:
TSENG, PEI-HSIU
Exec Dt:
11/29/2019
WEI, I-SHUAN
Exec Dt:
11/29/2019
LIN, JIA-YOU
Exec Dt:
11/29/2019
CHANG, SHOU-ZEN
Exec Dt:
12/02/2019
LIN, CHI-WEI
Exec Dt:
11/29/2019
LIN, HUNG-HSUN
Exec Dt:
11/29/2019
Assignee:
POWERCHIP SEMICONDUCTOR MANUFACTURING CORPORATION
NO.18, LI-HSIN RD. 1, HSINCHU SCIENCE PARK
HSINCHU, TAIWAN
Correspondent:
WINSTON HSU
5F., NO.389, FUHE RD., YONGHE DIST.,
NEW TAIPEI CITY, TAIWAN

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