Patent Assignment Abstract of Title
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Total Assignments:
1
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Patent #:
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Issue Dt:
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01/05/2021
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Application #:
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15982901
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Filing Dt:
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05/17/2018
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Publication #:
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Pub Dt:
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11/21/2019
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Inventors:
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Prabhu Raj V.K., Kamatchi S. Gopalakrishnan, M. Ramana Reddy
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Title:
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SYMMETRIC PATH/LINK OVER LAG INTERFACE USING LLDP FOR TIME SYNCHRONIZATION BETWEEN TWO NODES USING PTP
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Assignment:
1
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ASSIGNMENT OF ASSIGNORS INTEREST (SEE DOCUMENT FOR DETAILS).
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| 1133 INNOVATION WAY |
| SUNNYVALE, CALIFORNIA 94089 |
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| HARRITY AND HARRITY, LLP |
| 11350 RANDOM HILLS ROAD |
| SUITE 600 |
| FAIRFAX, VA 22030 |
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