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Patent Assignment Abstract of Title
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Total Assignments: 2
Patent #:
Issue Dt:
06/01/2021
Application #:
16796824
Filing Dt:
02/20/2020
Inventors:
Sasikanth Manipatruni, Robert Menezes, Yuan-Sheng Fang, Rajeev Kumar Dokania et al
Title:
LINEAR INPUT AND NON-LINEAR OUTPUT THRESHOLD LOGIC GATE
Assignment: 1
Reel/Frame:
052389/0386Recorded: 04/14/2020Pages: 14
Conveyance:
ASSIGNMENT OF ASSIGNORS INTEREST (SEE DOCUMENT FOR DETAILS).
Assignors:
Exec Dt:
12/27/2019
Exec Dt:
12/27/2019
Exec Dt:
12/31/2019
Exec Dt:
12/27/2019
Exec Dt:
12/27/2019
Exec Dt:
12/27/2019
Assignee:
180 STEUART STREET #192524
SAN FRANCISCO, CALIFORNIA 94105
Correspondent:
GREEN, HOWARD, & MUGHAL LLP
5 CENTERPOINTE DR.
SUITE 400
LAKE OSWEGO, OR 97035
Assignment: 2
Reel/Frame:
052709/0348Recorded: 05/20/2020Pages: 17
Conveyance:
CORRECTIVE ASSIGNMENT TO CORRECT THE INVENTORSHIP PREVIOUSLY RECORDED AT REEL: 052389 FRAME: 0386. ASSIGNOR(S) HEREBY CONFIRMS THE ASSIGNMENT.
Assignors:
Exec Dt:
12/27/2019
Exec Dt:
12/27/2019
Exec Dt:
12/31/2019
Exec Dt:
12/27/2019
Exec Dt:
12/27/2019
Exec Dt:
12/27/2019
Exec Dt:
01/24/2020
Assignee:
180 STEUART STREET #192524
SAN FRANCISCO, CALIFORNIA 94105
Correspondent:
GREEN, HOWARD, & MUGHAL LLP
5 CENTERPOINTE DR.
SUITE 400
LAKE OSWEGO, OR 97035

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