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Patent Assignment Abstract of Title

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Total Assignments: 1

Patent #:	11165430	Issue Dt:	11/02/2021	Application #:	17129842	Filing Dt:	12/21/2020
Inventors:	Yuan-Sheng Fang, Rajeev Kumar Dokania, Ramamoorthy Ramesh, Sasikanth Manipatruni et al
Title:	MAJORITY LOGIC GATE BASED SEQUENTIAL CIRCUIT

Assignment: 1

Reel/Frame:

Recorded: 12/23/2020

Pages: 16

Conveyance:

ASSIGNMENT OF ASSIGNORS INTEREST (SEE DOCUMENT FOR DETAILS).

Assignors:

Exec Dt:

01/31/2020

Exec Dt:

01/30/2020

Exec Dt:

01/29/2020

Exec Dt:

01/29/2020

Exec Dt:

01/28/2020

Exec Dt:

01/31/2020

Exec Dt:

01/30/2020

Assignee:

180 STEUART STREET #192524

SAN FRANCISCO, CALIFORNIA 94105

Correspondent:

GREEN, HOWARD, & MUGHAL LLP

5 CENTERPOINTE DR.

SUITE 400

LAKE OSWEGO, OR 97035

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