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Patent Assignment Abstract of Title
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Total Assignments: 2
Patent #:
Issue Dt:
05/17/2022
Application #:
16841342
Filing Dt:
04/06/2020
Publication #:
Pub Dt:
10/07/2021
Inventors:
David Hurley, Ioan Domsa, Ian Colgan, Gerhardus Van Der Linde, Patrick Hughes et al
Title:
SEMICONDUCTOR PROCESSING SYSTEM WITH IN-SITU ELECTRICAL BIAS AND METHODS THEREOF
Assignment: 1
Reel/Frame:
053568/0679Recorded: 08/20/2020Pages: 11
Conveyance:
ASSIGNMENT OF ASSIGNORS INTEREST (SEE DOCUMENT FOR DETAILS).
Assignors:
Exec Dt:
04/30/2020
Exec Dt:
05/06/2020
Exec Dt:
05/05/2020
Exec Dt:
05/01/2020
Exec Dt:
05/05/2020
Exec Dt:
05/05/2020
Exec Dt:
05/01/2020
Exec Dt:
05/05/2020
Exec Dt:
04/05/2020
Assignee:
AKASAKA BIZ TOWER
3-1 AKASAKA 5-CHOME
TOKYO, JAPAN 107-6325
Correspondent:
SLATER MATSIL, LLP
17950 PRESTON ROAD
SUITE 1000
DALLAS, TX 75252
Assignment: 2
Reel/Frame:
053723/0697Recorded: 09/08/2020Pages: 11
Conveyance:
ASSIGNMENT OF ASSIGNORS INTEREST (SEE DOCUMENT FOR DETAILS).
Assignors:
Exec Dt:
04/30/2020
Exec Dt:
05/06/2020
Exec Dt:
05/05/2020
Exec Dt:
05/01/2020
Exec Dt:
05/05/2020
Exec Dt:
05/05/2020
Exec Dt:
05/01/2020
Exec Dt:
05/05/2020
Exec Dt:
05/04/2020
Assignee:
AKASAKA BIZ TOWER
3-1 AKASAKA 5-CHOME
MINATO-KU, TOKYO, JAPAN 107-6325
Correspondent:
SLATER MATSIL, LLP
17950 PRESTON ROAD
SUITE 1000
DALLAS, TX 75252

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