skip navigationU S P T O SealUnited States Patent and Trademark Office AOTW logo
Home|Site Index|Search|Guides|Contacts|eBusiness|eBiz alerts|News|Help
Assignments on the Web > Patent Query
Patent Assignment Abstract of Title
NOTE:Results display only for issued patents and published applications. For pending or abandoned applications please consult USPTO staff.

Total Assignments: 1
Patent #:
Issue Dt:
06/14/2022
Application #:
17028459
Filing Dt:
09/22/2020
Publication #:
Pub Dt:
08/05/2021
Inventors:
Guo-Huei WU, Pochun WANG, Chih-Liang CHEN, Li-Chun TIEN
Title:
SEMICONDUCTOR DEVICE HAVING BURIED LOGIC CONDUCTOR TYPE OF COMPLEMENTARY FIELD EFFECT TRANSISTOR, METHOD OF GENERATING LAYOUT DIAGRAM AND SYSTEM FOR SAME
Assignment: 1
Reel/Frame:
053852/0695Recorded: 09/22/2020Pages: 2
Conveyance:
ASSIGNMENT OF ASSIGNORS INTEREST (SEE DOCUMENT FOR DETAILS).
Assignors:
Exec Dt:
05/21/2020
Exec Dt:
05/21/2020
Exec Dt:
05/27/2020
Exec Dt:
05/27/2020
Assignee:
NO. 8, LI-HSIN RD. VI, HSINCHU SCIENCE PARK
HSINCHU, TAIWAN 300
Correspondent:
HAUPTMAN HAM, LLP (TSMC)
2318 MILL ROAD
SUITE 1400
ALEXANDRIA, VA 22314

Search Results as of: 05/29/2024 04:27 PM
If you have any comments or questions concerning the data displayed, contact PRD / Assignments at 571-272-3350. v.2.6
Web interface last modified: August 25, 2017 v.2.6
| .HOME | INDEX| SEARCH | eBUSINESS | CONTACT US | PRIVACY STATEMENT