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Patent Assignment Abstract of Title
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Total Assignments: 2
Patent #:
Issue Dt:
11/08/2022
Application #:
17107484
Filing Dt:
11/30/2020
Publication #:
Pub Dt:
04/15/2021
Inventors:
Chih Wei Lu, Chung-Ju Lee, Hai-Ching Chen, Chien-Hua Huang, Tien-I Bao
Title:
Method and Structure for Semiconductor Device Having Gate Spacer Protection Layer
Assignment: 1
Reel/Frame:
054495/0210Recorded: 11/30/2020Pages: 7
Conveyance:
ASSIGNMENT OF ASSIGNORS INTEREST (SEE DOCUMENT FOR DETAILS).
Assignors:
Exec Dt:
07/04/2017
Exec Dt:
02/24/2017
Exec Dt:
09/04/2015
Exec Dt:
09/04/2015
Exec Dt:
09/04/2015
Assignee:
NO. 8, LI-HSIN RD. 6
SCIENCE-BASED INDUSTRIAL PARK
HSIN-CHU, TAIWAN 300-77
Correspondent:
HAYNES AND BOONE, LLP (24061) IP SECTION
2323 VICTORY AVENUE
SUITE 700
DALLAS, TX 75219
Assignment: 2
Reel/Frame:
068326/0474Recorded: 08/05/2024Pages: 15
Conveyance:
ASSIGNMENT OF ASSIGNORS INTEREST (SEE DOCUMENT FOR DETAILS).
Assignor:
Exec Dt:
07/19/2024
Assignee:
251 LITTLE FALLS DRIVE
WILMINGTON, DELAWARE 19808-1674
Correspondent:
MARK SPOLYAR
ALMANAC IP ADVISORS LLP
22 HOFFMAN AVE
SAN FRANCISCO, CA 94114

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