Patent Assignment Abstract of Title
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Total Assignments:
1
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Patent #:
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Issue Dt:
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08/22/2023
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Application #:
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17064552
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Filing Dt:
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10/06/2020
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Publication #:
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Pub Dt:
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04/07/2022
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Inventors:
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Srivatsan Srinivasan, John G. Favor
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Title:
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PROCESSOR THAT MITIGATES SIDE CHANNEL ATTACKS BY PREVENTS CACHE LINE DATA IMPLICATED BY A MISSING LOAD ADDRESS FROM BEING FILLED INTO A DATA CACHE MEMORY WHEN THE LOAD ADDRESS SPECIFIES A LOCATION WITH NO VALID ADDRESS TRANSLATION OR NO PERMISSION TO READ FROM THE LOCATION
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Assignment:
1
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ASSIGNMENT OF ASSIGNORS INTEREST (SEE DOCUMENT FOR DETAILS).
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| 960 SARATOGA AVE, #206 |
| SAN JOSE, CALIFORNIA 95129 |
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| HUFFMAN LAW GROUP, P.C. |
| 6925 SNOW MASS DR. |
| COLORADO SPRINGS, CO 80908 |
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