Patent Assignment Abstract of Title
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Total Assignments:
1
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Patent #:
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Issue Dt:
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01/02/2024
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Application #:
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17742363
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Filing Dt:
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05/11/2022
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Publication #:
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Pub Dt:
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11/16/2023
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Inventors:
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Albert Shih-Huai LIN, Niravkumar PATEL, Amitava MAJUMDAR, Jane Wang SOWARDS
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Title:
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INTEGRATED CIRCUIT CHIP TESTING INTERFACE WITH REDUCED SIGNAL WIRES
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Assignment:
1
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ASSIGNMENT OF ASSIGNORS INTEREST (SEE DOCUMENT FOR DETAILS).
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2100 LOGIC DRIVE |
SAN JOSE, CALIFORNIA 95124 |
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XILINX, INC. |
2100 LOGIC DRIVE |
SAN JOSE, CA 95124 |
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06/18/2024 02:17 AM
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