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Patent Assignment Abstract of Title
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Total Assignments: 1
Patent #:
Issue Dt:
07/09/2024
Application #:
17725026
Filing Dt:
04/20/2022
Publication #:
Pub Dt:
11/10/2022
Inventors:
Aws Shallal, Panduka Wijetunga, Joey M. Esteves
Title:
Methods and Circuits for Power Management of a Memory Module
Assignment: 1
Reel/Frame:
059674/0517Recorded: 04/22/2022Pages: 3
Conveyance:
ASSIGNMENT OF ASSIGNORS INTEREST (SEE DOCUMENT FOR DETAILS).
Assignors:
Exec Dt:
05/11/2021
Exec Dt:
05/07/2021
Exec Dt:
05/10/2021
Assignee:
4453 NORTH FIRST STREET, SUITE 100
SAN JOSE, CALIFORNIA 95134
Correspondent:
ANN WILLIAMS
4453 NORTH FIRST STREET, SUITE 100
SAN JOSE, CA 95134

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