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Patent Assignment Abstract of Title
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Total Assignments: 1
Patent #:
Issue Dt:
09/17/2024
Application #:
18022272
Filing Dt:
02/21/2023
Publication #:
Pub Dt:
08/29/2024
Inventors:
Zhikuang CAI, Hang YANG, Zhenghao ZHAO, Hongqiang ZHU, Henglu WANG, Jingjing GUO et al
Title:
METHOD FOR EXTRACTING PARASITIC CAPACITANCE OF INTERCONNECTION LINES OF INTEGRATED CIRCUIT BASED ON DISCONTINUOUS GALERKIN FINITE ELEMENT METHOD
Assignment: 1
Reel/Frame:
062790/0151Recorded: 02/23/2023Pages: 6
Conveyance:
ASSIGNMENT OF ASSIGNORS INTEREST (SEE DOCUMENT FOR DETAILS).
Assignors:
Exec Dt:
02/16/2023
Exec Dt:
02/16/2023
Exec Dt:
02/16/2023
Exec Dt:
02/16/2023
Exec Dt:
02/16/2023
Exec Dt:
02/16/2023
Exec Dt:
02/16/2023
Exec Dt:
02/16/2023
Assignees:
BUILDING 9,10, NO. 33 XINKANG ROAD, CHONGCHUAN DISTRICT NANTONG,
JIANGSU, CHINA 226000
BUILDING 10, YUNYUAN, NO. 33 XINKANG ROAD, CHONGCHUAN DISTRICT NANTONG,
JIANGSU, CHINA 226000
Correspondent:
JCIPRNET
8F-1, NO. 100, ROOSEVELT RD. SEC. 2,
TAIPEI, 100404 TAIWAN

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