Patent Assignment Abstract of Title
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Total Assignments:
1
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Patent #:
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Issue Dt:
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09/17/2024
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Application #:
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18022272
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Filing Dt:
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02/21/2023
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Publication #:
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Pub Dt:
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08/29/2024
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Inventors:
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Zhikuang CAI, Hang YANG, Zhenghao ZHAO, Hongqiang ZHU, Henglu WANG, Jingjing GUO et al
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Title:
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METHOD FOR EXTRACTING PARASITIC CAPACITANCE OF INTERCONNECTION LINES OF INTEGRATED CIRCUIT BASED ON DISCONTINUOUS GALERKIN FINITE ELEMENT METHOD
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Assignment:
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ASSIGNMENT OF ASSIGNORS INTEREST (SEE DOCUMENT FOR DETAILS).
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BUILDING 9,10, NO. 33 XINKANG ROAD, CHONGCHUAN DISTRICT NANTONG, |
JIANGSU, CHINA 226000 |
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BUILDING 10, YUNYUAN, NO. 33 XINKANG ROAD, CHONGCHUAN DISTRICT NANTONG, |
JIANGSU, CHINA 226000 |
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JCIPRNET |
8F-1, NO. 100, ROOSEVELT RD. SEC. 2, |
TAIPEI, 100404 TAIWAN |
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11/11/2024 07:06 AM
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