Patent Assignment Abstract of Title
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Total Assignments:
3
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Patent #:
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Issue Dt:
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09/23/1986
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Application #:
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06440283
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Filing Dt:
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11/09/1982
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Inventors:
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GRAHAM SHENTON, IOAN G. JONES, DAVID W. LUCAS, RONALD E. BARTON
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Title:
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METHOD AND STRUCTURE FOR USE IN DESIGNING AND BUILDING ELECTRONIC SYSTEMS IN INTEGRATED CIRCUITS
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Assignment:
1
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ASSIGNMENT OF ASSIGNORS INTEREST.
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| 2830 NORTH FIRST ST |
| SAN JOSE, CALIFORNIA |
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| FLEHR, HOHBACH, TEST, ALBRITTON & |
| HERBERT |
| STE. 3400, 4 EMBARCADERO CTR. |
| SAN FRANCISCO, CA 94111 |
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Assignment:
2
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SECURITY INTEREST (SEE DOCUMENT FOR DETAILS).
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| 3000 LAKESIDE DRIVE |
| SANTA CLARA, CALIFORNIA 95054 |
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| HOPKINS & CARLEY |
| FIFTEENTH FLOOR |
| 150 ALMADEN BOULEVARD |
| SAN JOSE, CA 95113-2089 |
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Assignment:
3
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ADDENDUM TO COLLATERAL ASSIGNMENT OF PATENTS
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| ATT - LOAN SERVICES 2202 NORTH FIRST STREET SAN JOSE, CA 95131 |
| SAN JOSE,, CALIFORNIA |
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| SILICON VALLEY BANK |
| ATT - LOAN SERVICES |
| 2202 NORTH FIRST STREET |
| SAN JOSE, CA 95131 |
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